EN27LN2G08 Datasheet, PDF (41/56 Pages) Eon Silicon Solution Inc. – 2 Gigabit (256M x 8), 3.3 V NAND Flash Memory

Status Register Definition for 70h Command
I/O Page Program Block Erase
I/O0
Pass / Fail
Pass / Fail
I/O1
Not Use
(Pass/Fail, OTP)
I/O2
Not Use
I/O3
Not Use
I/O4
Not Use
Not Use
Not Use
Not Use
Not Use
I/O5
Not Use
Not Use
Read
Not Use
Not Use
Not Use
Not Use
Not Use
Not Use
I/O6
Ready / Busy
Ready / Busy Ready / Busy
I/O7
Write Protect
Write Protect Write Protect
EN27LN2G08
Cache Read
Not Use
Not Use
Not Use
Not Use
Not Use
True
Ready / Busy
Ready / Busy
Write Protect
Definition
Pass: ”0”
Fail: ”1”
Don’t cared
Don’t cared
Don’t cared
Don’t cared
Busy: ”0”
Ready: ”1”
Busy: ”0”
Ready: ”1”
Protected: ”0”
Not Protected: ”1”
Status Register Definition for F1h Command
I/O Page Program Block Erase
Cache
Program
Read
Cache Read
Definition
I/O0
Chip Pass / Fail Chip Pass / Fail
Chip Pass /
Fail (N)
Not Use
Not Use
Pass: ”0”
Fail: ”1”
I/O1
Plane0 Pass /
Fail
Plane0 Pass / Plane0 Pass /
Fail
Fail (N)
Not Use
Not Use
Pass: ”0”
Fail: ”1”
I/O2
Plane1 Pass /
Fail
Plane1 Pass / Plane1 Pass /
Fail
Fail (N)
Not Use
Not Use
Pass: ”0”
Fail: ”1”
I/O3
Not Use
Not Use
Plane0 Pass /
Fail (N-1)
Not Use
Not Use
Pass: ”0”
Fail: ”1”
I/O4
Not Use
Not Use
Plane1 Pass /
Fail (N-1)
Not Use
Not Use
Pass: ”0”
Fail: ”1”
I/O5
Not Use
Not Use
True Ready /
Busy
Not Use
True
Busy: ”0”
Ready / Busy Ready: ”1”
Busy: ”0”
I/O6
Ready / Busy
Ready / Busy Ready / Busy Ready / Busy Ready / Busy _{Ready: ”1”}
I/O7
Write Protect
Write Protect
Write Protect Write Protect
Write Protect ^{Protected: ”0”}
Not Protected: ”1”
Note:
1. I/Os defined NA are recommended to be masked out when Read Status is being executed.
2. N : current page, N-1 : previous page.
This Data Sheet may be revised by subsequent versions
41
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. D, Issue Date: 2013/12/13