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EN27LN2G08 Datasheet, PDF (13/56 Pages) Eon Silicon Solution Inc. – 2 Gigabit (256M x 8), 3.3 V NAND Flash Memory
NAND Flash Technical Notes
EN27LN2G08
Mask Out Initial Invalid Block(s)
Initial invalid blocks are defined as blocks that contain one or more initial invalid bits whose reliability is
not guaranteed by Eon. The information regarding the initial invalid block(s) is called the initial invalid
block information. Devices with initial invalid block(s) have the same quality level as devices with all
valid blocks and have the same AC and DC characteristics. An initial invalid block(s) does not affect the
performance of valid block(s) because it is isolated from the bit line and the common source line by a
select transistor. The system design must be able to mask out the initial invalid block(s) via address
mapping.
The 1st block, which is placed on 00h block address, is guaranteed to be a valid block up to 1K
program/erase cycles with 4 bit/512 bytes ECC.
Identifying Initial Invalid Block(s) and Block Replacement Management
Unpredictable behavior may result from programming or erasing the defective blocks. Figure on next
page illustrates an algorithm for searching factory-mapped defects, and the algorithm needs to be
executed prior to any erase or program operations.
A host controller has to scan blocks from block 0 to the last block using page read command and check
the data at the column address of 0 or 2,048. If the read data is not FFh, the block is interpreted as an
invalid block. The initial invalid block information is erasable, and which is impossible to be recovered
once it has been erased. Therefore, the host controller must be able to recognize the initial invalid block
information and to create a corresponding table to manage block replacement upon erase or program
error when additional invalid blocks develop with Flash memory usage.
This Data Sheet may be revised by subsequent versions
13
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. D, Issue Date: 2013/12/13