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BCM43143KMLGT Datasheet, PDF (29/58 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11b/g/n MAC/PHY/Radio with USB/SDIO Host Interface | |||
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BCM43143 Advance Data Sheet
Package Signal Descriptions
Table 4: BCM43143 Signal Descriptions (Cont.)
Pin
Signal
GPIO Pins
22
GPIO0
TDI
BTCX_RF_ACTIVE
SECI_IN0
23
GPIO1
TDO
BTCX_TX_CONF
SECI_OUT
24
GPIO2
TCK
BTCX_STATUS
SECI_AUX0
26
GPIO3
TRST-L
BTCX_PRISEL
SECI_IN1
27
GPIO4
TMS
BTCX_FREQ
28
GPIO5
EXTPOR_L
54
GPIO17
55
GPIO18
UART Interface
2
UART_RX
3
UART_TX
Crystal Oscillator
19
XTAL_ON_OUT
18
XTAL_OP_IN
Type Description
I/O
This pin is muxed with:
⢠GPIO0, a general purpose I/O pin
⢠JTAG test data in
⢠Legacy BT coexistence RF Active
⢠SECI in0
I/O
This pin is muxed with:
⢠GPIO1, a general purpose I/O pin
⢠JTAG test data out
⢠Legacy BT coexistence TX Conf
⢠SECI out
I/O
This pin is muxed with:
⢠GPIO2, a general purpose I/O pin
⢠JTAG test clock
⢠Legacy BT coexistence Status
⢠SECI aux0
I/O
This pin is muxed with:
⢠GPIO3, a general purpose I/O pin
⢠JTAG test reset low
⢠Legacy BT coexistence Priority Select
⢠SECI in1
I/O
This pin is muxed with:
⢠GPIO4, a general purpose I/O pin
⢠JTAG test mode select
⢠Legacy BT coexistence FREQ
I/O (PU) This pin is muxed with:
⢠GPIO5, a general purpose I/O pin
⢠External power-on reset low, when JTAG_SEL high
I/O (PD) General purpose I/O pin
I/O (PD) General purpose I/O pin
I/O (PD) UART receive data (SW debug)
I/O (PU) UART transmit data (SW debug)
O
XTAL oscillator output.
Connect a 20 MHz, 10 ppm crystal between the XTAL_ON_OUT
and XTAL_OP_IN pins
I
XTAL oscillator input
Broadcom®
November 14, 2014 ⢠43143-DS104-R
Single-Chip IEEE 802.11b/g/n MAC/PHY/Radio
Page 28
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