BCM43143KMLGT Datasheet, PDF (14/58 Pages) Cypress Semiconductor – Single-Chip IEEE 802.11b/g/n MAC/PHY/Radio with USB/SDIO Host Interface

BCM43143 Advance Data Sheet
Reset and Low-Power Off Mode
Figure 4: Power Topology with the VDD33 (3.3V) Main Supply
VDDIO
GPIO
BCM43143
USB_AVDD3P3
For 5 volts power
supplies only
5V
VBUS
D+
D-
GND
4.7 µF
3.3V
WRF_PAD_VDD3P3
WRF_PA_VDD3P3
3.3V
SR_VDDVBAT5V
5V
2.2 µH
1 µF
1 µF
SR_VLX
LNDO_VDD1P5
LDO_VDD1P5
BG
3.3V - 5V
Buck
500mA
1.35V
PMU
1.35V
CLDO
150 mA
1.2V
3.3V
LDO
USB2.0
50 mA
2.5V
PA
1.35V
Radio
mini
PMU
1.2V
XTAL_VDD1P2
WRF_SYN_VDD1P2
LNLDO_VOUT1P2
1 µF
Digital
Core
2.2 µF
Reset and Low-Power Off Mode
Full-chip reset is achieved by switching off the 3.3V VDDIO voltage to pins 1, 25, 37, and 53. This puts the chip
in reset and low-power off mode; in this mode the internal CBUCK switcher is shut down, bringing the total
typical current consumption down to less than 100 µA. The device must be kept in reset/low-power off mode for
at least 25 ms.
Broadcom^®
November 14, 2014 • 43143-DS104-R
Single-Chip IEEE 802.11b/g/n MAC/PHY/Radio
Page 13