SAM9260_14 Datasheet, PDF (769/784 Pages) ATMEL Corporation – AT91SAM ARM-based Embbedded MPU

Revision
6221E
Comments
All new information in Section 7.2.1 ”Matrix Masters”, Table 7-1, “List of Bus Matrix Masters,” on
page 16 and Section 7.2.3 ”Master to Slave Access”, Table 7-3, “AT91SAM9260 Masters to Slaves
Access,” on page 16.
In Figure 2-1 ”SAM9260 Block Diagram” on page 3, updated EBI signals NRD, NWR0, NWR1, NWR3.
Added details on Timer/Counter blocks in Section 10.4.5 “Timer Counter” on page 38.
Updated Chip ID in Section 8.4 “Chip Identification” on page 21.
Removed information on Tightly-coupled Memories in Section 10. “ARM926EJ-S Processor
Overview” on page 29. Not applicable to product.
Boot Program: Updated Table 13-3, “Large Crystal Table (MHz) OSCSEL = 1,” on page 79 and
Table 13-4, “Input Frequencies Supported,” on page 80 with new information.
In Section 13.4 ”DataFlash Boot”, corrected Figure 13-4 ”LDR Opcode” on page 83.
Change
Request
Ref.
4457
4431
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EBI: Updated signal names in Figure 19-1 ”Organization of the External Bus Interface” on page 128,
A[20-18], NRD, NWR0, NWR1, NWR3, A21 and A22.
Updated A21 and A22 signals in Table 19-4, “EBI Pins and External Device Connections,” on
page 132.
Removed software recommendation for NANDOE and NANDWE PIO multiplexing in Section 19.7.3.2
“Software Configuration” on page 144.
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RSTC: Updated Figure 14-4, ”General Reset State” on page 96 with Main Supply POR output wave.
Updated Section 12.4.4.1 “General Reset” on page 63 with new information on VDDCORE and
backup_nreset signal reactivation.
Added new Section 12.4.3 “BMS Sampling” on page 63.
SHDW: Corrected offset value for SHDW_SR register in Table 18-2, “Shutdown Controller (SHDWC)
Registers,” on page 127.
ECC: Corrected offset value for ECC_SR register in Table 23-1, “Register Mapping,” on page 242.
PMC: In Section 25.3 “Processor Clock Controller” on page 246, updated information on Idle Mode
and added Note.
SPI: Corrected information in Section 29.7.4 “SPI Slave Mode” on page 355 on OVRES (SPI_SR) and
data read in SPI_RDR.
TWI: New chapter inserted.
USART: In Section 32.5.1 ”I/O Lines” on page 448, added sentence on required use of internal pull up
on TXD pertaining to hardware handshaking feature/Modem mode.
In Section 32.6.2 ”Receiver and Transmitter Control” on page 454, in the fourth paragraph, software
reset effects (RSTRX and RSTTX in US_CR register) updated by replacing 2nd sentence.
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EMAC: Corrected status for IDLE bit in Section 36.5.3 ”Network Status Register” on page 624.
Added information on clocks in first paragraph of Section 36.3 ”Functional Description” on page 604.
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Corrected offset values for Channel Data Register3 and Reserved space in Section 40.6 ”Analog-to-
digital Converter (ADC) User Interface” on page 738, Table 40-2, “ADC Register Mapping”.
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SAM9260 [DATASHEET]
6221K–ATARM–15-Oct-12
769