SAM9260_14 Datasheet, PDF (670/784 Pages) ATMEL Corporation – AT91SAM ARM-based Embbedded MPU

38.5.1 ISI Control 1 Register
Register Name: ISI_CR1
Access Type: Read/Write
Reset Value: 0x00000002
31
30
29
28
27
26
25
SFD
23
22
21
20
19
18
17
SLD
15
14
13
12
11
CODEC_ON
THMASK
FULL
-
10
9
FRATE
7
CRC_SYNC
6
EMB_SYNC
5
4
3
2
1
-
PIXCLK_POL VSYNC_POL HSYNC_POL
ISI_DIS
• ISI_RST: Image sensor interface reset
Write-only. Refer to bit SOFTRST in Section 38.5.3 “ISI Status Register” on page 674 for soft reset status.
0: No action.
1: Resets the image sensor interface.
• ISI_DIS: Image sensor disable:
0: Enable the image sensor interface.
1: Finish capturing the current frame and then shut down the module.
• HSYNC_POL: Horizontal synchronization polarity
0: HSYNC active high.
1: HSYNC active low.
• VSYNC_POL: Vertical synchronization polarity
0: VSYNC active high.
1: VSYNC active low.
• PIXCLK_POL: Pixel clock polarity
0: Data is sampled on rising edge of pixel clock.
1: Data is sampled on falling edge of pixel clock.
• EMB_SYNC: Embedded synchronization
0: Synchronization by HSYNC, VSYNC.
1: Synchronization by embedded synchronization sequence SAV/EAV.
24
16
8
0
ISI_RST
• CRC_SYNC: Embedded synchronization
SAM9260 [DATASHEET]
6221K–ATARM–15-Oct-12
670