SAM9260_14 Datasheet, PDF (671/784 Pages) ATMEL Corporation – AT91SAM ARM-based Embbedded MPU

0: No CRC correction is performed on embedded synchronization.
1: CRC correction is performed. if the correction is not possible, the current frame is discarded and the CRC_ERR is set in
the status register.
• FRATE: Frame rate [0..7]
0: All the frames are captured, else one frame every FRATE+1 is captured.
• FULL: Full mode is allowed
1: Both codec and preview datapaths are working simultaneously.
• THMASK: Threshold mask
0: 4, 8 and 16 AHB bursts are allowed.
1: 8 and 16 AHB bursts are allowed.
2: Only 16 AHB bursts are allowed.
• CODEC_ON: Enable the codec path enable bit
Write-only.
0: The codec path is disabled.
1: The codec path is enabled and the next frame is captured. Refer to bit CDC_PND in “ISI Status Register” on page 674.
• SLD: Start of Line Delay
SLD pixel clock periods to wait before the beginning of a line.
• SFD: Start of Frame Delay
SFD lines are skipped at the beginning of the frame.
SAM9260 [DATASHEET]
6221K–ATARM–15-Oct-12
671