SAM9260_14 Datasheet, PDF (462/784 Pages) ATMEL Corporation – AT91SAM ARM-based Embbedded MPU

Figure 32-3. SSC Functional Block Diagram
MCK Clock
Divider
APB
User
Interface
Transmitter
Clock Output
Controller
TK
TK Input
Transmit Clock ^{TX clock}
Frame Sync
TF
Controller
Controller
RX clock
TF
Start
RF _Selector
Transmit Shift Register
TD
TX PDC _{Transmit Holding}
Register
Transmit Sync
Holding Register
Load Shift
Receiver
Clock Output
Controller
RK
PDC
RK Input
Receive Clock ^{RX Clock}
Controller
Frame Sync
Controller
RF
TX Clock
RF
Start
TF _Selector
Receive Shift Register
RD
Interrupt Control
RX PDC Receive Holding
Register
Load Shift
Receive Sync
Holding Register
AIC
32.7.1 Clock Management
The transmitter clock can be generated by:
• an external clock received on the TK I/O pad
• the receiver clock
• the internal clock divider
The receiver clock can be generated by:
• an external clock received on the RK I/O pad
• the transmitter clock
• the internal clock divider
Furthermore, the transmitter block can generate an external clock on the TK I/O pad, and the receiver block can
generate an external clock on the RK I/O pad.
This allows the SSC to support many Master and Slave Mode data transfers.
SAM9260 [DATASHEET]
6221K–ATARM–15-Oct-12
462