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405EX Datasheet, PDF (66/67 Pages) Applied Micro Circuits Corporation – PowerPC 405EX Embedded Processor
PPC405EX – PowerPC 405EX Embedded Processor
Revision Log
Revision 1.09 - August 21, 2007
Preliminary Data Sheet
Date
02/27/2007
03/01/2007
03/22/2007
04/24/2007
05/24/2007
06/04/2007
06/07/2007
06/28/2007
07/12/2007
08/21/2007
Version
1.00
1.01
1.02
1.03
1.04
1.05
1.06
1.07
1.08
1.09
Contents of Modification
Initial creation of document.
Updates following review of initial document.
Change package drawing to eliminate confusion.
Expand system memory map.
Define FSource0 signal as Reserved.
Add Recommended Operating Conditions data.
Add thermal data.
Misc. updates and additions.
Misc. updates and additions including some limited timing data.
Correct one of three ball numbers assigned to PerData28.
Swap four balls between VDD and GND.
Swap one ball between OVDD and SVDD.
Correct typographical errors in Table 3.
Add missing alphabetical entries for PerAddr05, NAND Flash, and IIC1.
Add output current values to Tables 15 and 16.
Input various review comments.
Update Table 6 Notes column.
Update Block Diagram.
Swap SAVDD an EAVDD signal name assignments on package balls.
Add two UART configurations.
Add DDR SDRAM section extracted from 460EX with changes appropriate for 405EX.
Update timing information for all interfaces.
Add power values.
Update I/O capacitance values.
Remove Confidential status.
Input various review comments.
Input review comments and corrections.
Change default signals for GPIO balls to GPIO00–GPIO27 signals.
Eliminate confusing terminology in initialization section.
Change voltage names so that SDRAM voltage is always SVDD for both DDR1 and DDR2 types.
Six voltage pins originally labeled SVDD changed to EOVDD.
Update GMCRefClk specifications (rise time, jitter, etc.)
66
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