405EX Datasheet, PDF (53/67 Pages) Applied Micro Circuits Corporation – PowerPC 405EX Embedded Processor

PPC405EX – PowerPC 405EX Embedded Processor
Revision 1.09 - August 21, 2007
Preliminary Data Sheet
Table 16. Peripheral Interface I/O Clock Timings
Clock
Min
Max
Units
GMCTxClk frequency
125
125
MHz
GMCTxClk high time
45% of nominal
–
ns
GMCTxClk low time
55% of nominal
–
ns
GMCRxClk frequency
125
125
MHz
GMCRxClk high time
45% of nominal
–
ns
GMCRxClk low time
55% of nominal
–
ns
GMCGTxClk
125
125
MHz
GMCMDClk
2.5
25
MHz
GMCRefClk
125
125
MHz
GMCRefClk edge stability (phase jitter, cycle-to-cycle)
na
± 0.1
ns
GMCRefClk rise time
na
0.4
ns
GMCRefClk high time
40% of nominal
–
ns
GMCRefClk low time
60% of nominal
–
ns
GMCnRxClk
125
125
MHz
GMCnTxClk
125
125
MHz
UARTSerClk
1000/(2T_OPB1 + 2ns)
MHz
TmrClk
na
100
MHz
PerClk
100
MHz
TCK
na
20
MHz
USB2Clk (60MHz ± 0.05%)
57.97
60.03
MHz
PCIEnClkC, T (Differential clock input)
100
250
MHz
Notes:
1. T_OPB is the period in ns of the OPB clock. The internal OPB clock runs at an integral divisor ratio of the frequency of the PLB clock. The
maximum OPB clock frequency is 100MHz.
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