English
Language : 

405EX Datasheet, PDF (42/67 Pages) Applied Micro Circuits Corporation – PowerPC 405EX Embedded Processor
PPC405EX – PowerPC 405EX Embedded Processor
Revision 1.09 - August 21, 2007
Preliminary Data Sheet
Table 6. Signal Functional Description (Sheet 5 of 7)
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 37 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 37 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
Signal Name
Description
I/O
Type
NAND Flash Interface
NFALE
Address latch enable.
I/O 3.3V LVTTL
NFCE0
NFCE1:3
Chip select 0.
Chip selects 1:3.
O
3.3V LVTTL
I/O 3.3V LVTTL
NFCLE
Command latch enable.
I/O 3.3V LVTTL
NFData00:15
NFRdyBusy
NFRE
Data Bus
I/O
Read/Busy. If low, indicates that Read/Erase command is in process.
If high, indicates that the command is complete.
I/O
Read enable.
I/O
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
NFWE
Write enable.
DDR1/2 SDRAM Interface
I/O 3.3V LVTTL
MemData00:31
Memory data.
I/O
2.5V (1.8V)
SSTL2 Dr/Rcv
MemAddr00:14
Memory address.
O
2.5V (1.8V)
SSTL2 Dr/Rcv
RAS
CAS
MemClkEn
MemClkOut0
MemClkOut0
Row address strobe.
Column address strobe.
Clock enable.
Differential DDR SDRAM clock output.
O
2.5V (1.8V)
SSTL2 Dr/Rcv
O
2.5V (1.8V)
SSTL2 Dr/Rcv
O
2.5V (1.8V)
SSTL2 Dr/Rcv
O
2.5V (1.8V)
SSTL2 Dr/Rcv
MemFBD
Feedback driver.
O
2.5V (1.8V)
SSTL2 Dr/Rcv
MemFBR
Feedback receiver. Connect externally to MemFBD.
I
2.5V (1.8V)
SSTL2 Dr/Rcv
MemODT0:1
On-die termination.
O
2.5V (1.8V)
SSTL2 Dr/Rcv
DM0:4
DQS0:4
BA0:2
BankSel0:1
Write data byte lane mask. DM4 is the byte lane mask for the ECC
byte lane.
Byte lane strobe. DQS4 is the strobe for the ECC lane.
Bank address for up to eight banks.
Bank select for up to two SDRAM memory banks.
O
2.5V (1.8V)
SSTL2 Dr/Rcv
I/O
2.5V (1.8V)
SSTL2 Dr/Rcv
O
2.5V (1.8V)
SSTL2 Dr/Rcv
O
2.5V (1.8V)
SSTL2 Dr/Rcv
ECC0:7
ECC check bit byte.
I/O
2.5V (1.8V)
SSTL2 Dr/Rcv
WE
Write enable.
O
2.5V (1.8V)
SSTL2 Dr/Rcv
Notes
1, 2
42
AMCC Proprietary