405EX Datasheet, PDF (57/67 Pages) Applied Micro Circuits Corporation – PowerPC 405EX Embedded Processor

PPC405EX – PowerPC 405EX Embedded Processor
Revision 1.09 - August 21, 2007
Preliminary Data Sheet
Table 18. I/O Specifications—333 MHz to 667 MHz CPU
Notes:
1. PerClk rising edge at package pin with a 10pF load trails the internal PLB clock by approximately 0.8ns.
Input (ns)
Signal
Setup Time Hold Time
(T_IS min) (T_IH min)
External Peripheral Interface
PerClk
PerAddr05:31
2.3
1
PerCS0:3
2.3
1
PerData00:31
2.3
1
PerDataPar0:3
2.3
1
PerOE
2.3
1
PerReady
2.3
1
PerRW
2.3
1
PerWBE0:3
2.3
1
PerBLast
2.3
1
PerErr
2.3
1
ExtReset
2.3
1
BusReq
2.3
1
HoldReq
2.3
1
HoldAck
2.3
1
ExtAck
2.3
1
ExtReq
2.3
1
NFALE
2.3
1
NFCE0:3
2.3
1
NFCLE
2.3
1
NFData0:15
2.3
1
NFRdyBusy
2.3
1
NFREn
2.3
1
NFWEn
2.3
1
Output (ns)
Valid Delay Hold Time
(T_OV max) (T_OH min)
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
5.3
1
Output Current (mA)
I_OH
I_OL
(minimum) (minimum)
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
na
na
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
11.08
7.37
Clock
PLB Clk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
PerClk
Notes
1
AMCC Proprietary
57