AK4601VQ Datasheet, PDF (64/111 Pages) Asahi Kasei Microsystems – Audio HUB CODEC with Digital Mixer

[AK4601]
■ Power-up Sequence
１. Power-up Sequence
The AK4601 should be powered up when the PDN pin = “L”. Set the PDN pin to “H” to start the power
supply circuits for REF (reference voltage source) generator and digital circuits after all power supplies
are fed. By setting the PDN pin to “H”, control registers are initialized. Control register settings should be
made with an interval of 1ms or more after the PDN pin = “H”.
The PLL starts operation by a clock reset release (CKRESETN bit = “0” → “1”) and generates the
internal master clock after setting control registers. Therefore, necessary system clock must be input
before a clock reset release.
The system clock must not be stopped except during clock reset and power-down mode (PDN pin = “L”).
Power Supply
PDN pin
Analog Input
SI / SDA pin
PMMB1 bit
PMMB2 bit
MIC Power
Output
600ns
(min)
100 ms
Analog Input Charge
1ms
CONT
(min) _{REG Setting}
100 ms
Stable MIC Power Output
CKRESETN bit
HRESETN bit
MCKI, BICKx pin
PLL Internal
Master Clock
Clock Determined
10 ms
Period until PLL oscillation
CONT
REG Setting
Start
Operation
Figure 52. Power-up Sequence
Note 47. The analog input charge period depends on the capacitance of AC coupling capacitor. It will be
100 msec if the capacitance is 1 µF.
Note 48. The output period of a stable microphone power depends on the capacitance of decoupling
capacitor at the MPREF pin. It will be 100 msec if the capacitance is 1 µF.
016000391-E-01
- 64 -
2016/12