AK4601VQ Datasheet, PDF (54/111 Pages) Asahi Kasei Microsystems – Audio HUB CODEC with Digital Mixer

[AK4601]
5-4. Stereo Mode
AK4601 supports stereo mode. BICK x pin should be set to arbitrary frequency more than word length x
2fs when DIEDGENx bit = “0”. BICK x pin should be set to arbitrary frequency more than slot length x 2fs
when DIEDGENx bit = “1”. BICK clock is supported up to 24.576MHz.
The SDINx input pins of the AK4601 support stereo input mode. Two slots data input is available for
each pin. A source address is assigned to each SDINx input pins when using stereo input mode. (Table
20). DISLx[1:0] bits control input data slot length of the SDINx pin. DIDLx[1:0] bits control the input data
word length of the SDINx pin. The slot data format is set by DILSBEx bit.
In stereo mode, DIEDGENx bit must be set to “0” when the data transmission timing of second channel
are LRCK edge basis. DISLx[1:0] bits setting are ignored when DIEDGENx bit = “0”.
The SDOUTx output pins of the AK4601 support stereo output mode. Two slots data output is available
for each pin. Each slot data can be assigned by setting SELDOxA-H[5:0] bits. DOSLx[1:0] bits control
output data slot length of the SDOUTx pin. DODLx[1:0] bits control the output data word length of the
SDOUTx pin. The slot data format is set by DOLSBEx bit.
In stereo mode, DOEDGENx bit must be set to “0” when the data transmission timing of second channel
are LRCK edge basis. DOSLx[1:0] bits setting are ignored when DIEDGENx bit = “0”.
Setting example of stereo mode is shown in Table 28.
Mode
0
1
2
3
4
5
Data Format
I²S Compatible
DCFx[2:0]
000
DILSBEx DIEDGENx DISLx[1:0] DIDLx[1:0]
DOLSBEx DOEDGENx DOSLx[1:0] DODLx[1:0]
0
0
x
Word Length
MSB Justified
101
0
0
x
Word Length
LSB Justified
101
1
0
x
Word Length
PCM Short Frame
110
0
1
Slot Length Word Length
PCM Long Frame
111
0
Irregular I²S
000
0
1
Slot Length _{Word Length}
1
Slot Length _{Word Length}
Table 28. Input/Output Data Format Setting Example (x: Do Not Care)
5-4-1. Mode 0: I²S Compatible Format
LRCKx
Lch
Rch
BICKx
SDINx
SDOUTx
Lch Data (MSB First)
Don’t Care Rch Data (MSB First)
Lch Data (MSB First)
Rch Data (MSB First)
Figure 26. I²S Compatible Format
Don’t Care
016000391-E-01
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2016/12