AK4601VQ Datasheet, PDF (48/111 Pages) Asahi Kasei Microsystems – Audio HUB CODEC with Digital Mixer

[AK4601]
2. Source Address, Source Selecting Registers
A source address is assigned to each input port source (Table 20). The output port source can be
selected by setting a source address of input port to the registers. Data on the data bus can be selected
freely by this source address. In TDM mode, arbitrary 2 channels audio data can be output from two
selected SDOUTx pins (Table 21).
Source Source
Address Name
Source Contents
Input Port
Clock Sync Domain
Setting Register (Table 19)
0x00 ALL0
0x0000 0000 fixed
ALL0
-
0x01 SDIN1A SDIN1 Slot1, 2 Input
0x02 SDIN1B SDIN1 Slot3, 4 Input
0x03 SDIN1C SDIN1 Slot5, 6 Input
0x04
0x05
SDIN1D SDIN1 Slot7, 8 Input
SDIN1E SDIN1 Slot9, 10 Input
SDIN1
Note 44
0x06 SDIN1F SDIN1 Slot11, 12 Input
0x07 SDIN1G SDIN1 Slot13, 14 Input
0x08 SDIN1H SDIN1 Slot15, 16 Input
0x09 SDIN2 SDIN2 Input
SDIN2 Note 44
0x0A SDIN3 SDIN3 Input
SDIN3 Note 44
0x10 VOLO1 VOL1 Output
VOLO1 SDVOL1[2:0]
0x11 VOLO2 VOL2 Output
VOLO2 SDVOL2[2:0]
0x12 VOLO3 VOL3 Output
VOLO3 SDVOL3[2:0]
0x15 ADC1 ADC1 Output
ADC1
SDADC1[2:0]
0x16
0x17
ADC2
ADCM
ADC2 Output
ADCM Output
CODEC SDCODEC[2:0]
0x18 Mixer A Mixer A Output
Mixer A SDMIXA[2:0]
0x19 Mixer B Mixer B Output
Mixer B SDMIXB[2:0]
Others N/A
N/A
N/A
N/A
(N/A: Not Available)
Table 20. Clock Sync Domain Setting for Source Address and Input Port
Note 44. Clock Sync Domain of the SDINx pin is automatically selected by setting EXBCKx[2:0] bits,
MSNx bit and SDBCKx[2:0] bits (Table 15, Table 16, Table 18).
016000391-E-01
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2016/12