AK7746 Datasheet, PDF (60/62 Pages) Asahi Kasei Microsystems – Audio DSP with 5-channel 24-bit ADC and Input Mux

[ASAHI KASEI]
[AK7746]
(2) Peripheral circuit
1) Ground and power supply
To minimize digital noise coupling, AVDD and DVDD should be individually de-coupled at the AK7746. System analog
power is supplied to AVDD.
Generally, power supply and ground wires must be connected separately according to the analog and digital systems.
Connect them at a position close to the power source on the PCB board. Decoupling capacitors and ceramic capacitors of small
capacity in particular, should be connected at positions as close as possible to the AK7746.
2) Reference voltage
The input voltage difference between the VREFH pin and the AVSS pin determines the full scale of analog input. Normally,
connect AVDD to VREFH, and connect 0.1µF ceramic capacitors from them to AVSS. To shut out high frequency noise, connect a
0.1µF ceramic capacitor in parallel with an appropriate 10µF electrolytic capacitor between this pin and AVSS. The ceramic capacitor
in particular should be connected as close as possible to the pin. To avoid coupling to the AK7746, digital signals and clock signals
should be kept away as far as possible from the VREFH pin.
VCOM is used as the common voltage of the analog signal.To filter out high frequency noise, connect a 0.1µF ceramic capacitor in
parallel with an appropriate 10µF electrolytic capacitor between this pin and AVSS. The ceramic capacitor should be connected as
close as possible to the pin. Do not draw current from the VCOM pin.
3) Analog input
Analog input signals are applied to the modulator through the differential input pins of each channel. The input voltage is
equal to the differential voltage between AIN+ and AIN- (∆VAIN = (AIN+) - (AIN-)), and the input range is ±FS = ±(VRADH -
VRADL) × 2.0/3.3. When VRADH = 3.3V and VRADL = 0V, the input range is within ±2.00V. The output code format is given in
terms of 2's complements.
When fs = 48 kHz, the AK7746 samples the analog input at 3.072 MHz. The digital filter eliminates noise from 30 kHz to
3.042 MHz. However, noise is not rejected in the bandwidth close to 3.072 MHz. Most audio signals do not have large noise in the
vicinity of 3.072 MHz, so a simple RC filter is sufficient.
The analog source voltage to the AK7746 is +3.3V(Typ.). Voltage of AVDD + 0.3 V or more, voltage of AVSS - 0.3 V or
less, and current of 10 mA or more must not be applied to analog input pins (AINL and AINR). Excessive current will damage the
internal protection circuit and will cause latch-up, thereby damaging the IC. Accordingly, if the surrounding analog circuit voltage is
±15 V, the analog input pins must be protected from signals with the absolute maximum rating or more.
10k
Signal
22µ
+
10k
47p
+10V
-
10k
+ _-10V
10k
47p
-
+
+
NJM5532D
4.7µ
+
4.7µ
2.00Vpp
AIN+
AIN-
2.00Vpp
Fig.9-2 Example of the input buffer circuit ( Differensial input )
The internal center level ( AVDD/2 ) for the analog input pins of the AK7746 (AINL+, AINL-, AINR+, AINR-, AINL2~L8,
AINR2~R8 and AINM) is made after initial reset release.
4) Connection to digital circuit
To minimize the noise resulting from the digital circuit, connect low voltage logic to the digital output. The applicable logic
family includes the 74LV, 74LV-A, 74ALVC and 74AVC series.
[MS0369-E00]
- 60 -
2004/12