AK7746 Datasheet, PDF (50/62 Pages) Asahi Kasei Microsystems – Audio DSP with 5-channel 24-bit ADC and Input Mux

[ASAHI KASEI]
[AK7746]
c) CRAM data read (during reset phase)
To read out the written coefficient data, input the command code and the address you want to read out. After that, set SI to
"H" and SCLK to "L”. The data is clocked out from SO in synchronization with the falling edge of SCLK. If there are continuous
addresses to be read, repeat the above procedure starting from the step where SI is set to "H".
Data transfer procedure
c Command code A1h
d Address upper
e Address lower
(1 0 1 0 0 0 0 1)
( 0 0 0 0 0 0 A9 A8)
(A7 . . . . . . A0)
S_RESET
RQ
SCLK
SI
SO
RDY
10100001
000000A9A8 A7 **** A1A0
D15 **** D0
D15 **** D0
Fig.8-25 Reading of CRAM data
[MS0369-E00]
- 50 -
2004/12