AK7746 Datasheet, PDF (45/62 Pages) Asahi Kasei Microsystems – Audio DSP with 5-channel 24-bit ADC and Input Mux

[ASAHI KASEI]
[AK7746]
c) Coefficient RAM writes (during reset phase)
5 bytes of data are used to perform coefficient RAM write operations (during reset phase). When all data has been transferred, the
RDY terminal goes to "H". Upon completion of writing into the CRAM, it goes to "H" to allow the next data to be input. When writing
to sequential addresses, input the data as shown below. To write discontinuous data, transition the RQ terminal from "H" to "L" and
then input the command code, address and data.
Data transfer procedure
c Command code A0h ( 1 0 1 0 0 0 0 0 )
d Address upper
( 0 0 0 0 0 0 A9 A8)
e Address lower
(A7 . . . . . . . A0)
f Data
(D15 . . . . . . D8)
g Data
(D7 . . . . . . D0)
S_RESET
RQ
SCLK
SI
RDY
SO
10100000 000000A9A8 A7****A1A0
D15****D0
D15****D0
Fig.8-18 Input of continuous address data into CRAM
S_RESET
RQ
SCLK
SI
RDY
SO
10100000 000000A9A8 A7***A1A0 D15****D0
10100000 000000A9A8 A7***A1A0 ^D15**
Input of discontinuous address data into CRAM
Fig.8-19 Input of discontinuous address data into CRAM
[MS0369-E00]
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2004/12