AK7746 Datasheet, PDF (26/62 Pages) Asahi Kasei Microsystems – Audio DSP with 5-channel 24-bit ADC and Input Mux

[ASAHI KASEI]
2-1) CONT0 : Sampling rate and interface selection.
[AK7746]
This register is enabled only during the system reset state ( S_RESET =”L”).
Command
Code
WR
60h 70h
Name
CONT0
D7
DFS[2]
D6
DFS[1]
D5
DFS[0]
D4
DIFS
D3
DIF[1]
D2
DIF[0]
D1
SETCK
D0 Default
× 0000 000X
c D7,D6,D5:DFS2,DFS1,DFS0 Sampling rate setting.
fs: sampling frequency
DFS
Mode
DFS[2]
DFS[1]
DFS[0]
CKS[1:0]
(Input frequency of XTI)
fs(kHz)
DSP
Number
of Steps
0h
1h
2h
0
0
0
0
384fs
256fs
64fs
48(44.1)
768
1
0
0
1
192fs
128fs
32fs
96(88.2)
384
2
0
1
0
N/A
N/A
N/A
N/A
N/A
3
0
1
1
576fs
384fs
96fs
32(29.4)
1152
4
1
0
0
1536fs 1024fs
256fs
12(11.025)
3072
5
1
0
1
768fs
512fs
128fs
24(22.05) 1536
6
1
1
0
1152fs 768fs
192fs
16(14.7)
2304
7
1
1
1
2304fs 1536fs
384fs
8
4608
Note) When CLK Mode 2S (CLKS[1:0]=2h & SMODE=”L”), DFS Mode 0 should be set.
ADC
ο
ο
N/A
ο
ο
ο
ο
ο
d D4:DIFS Audio interface selection
0: AKM method
1: I²S compatible (In this case, all input / output pins are I²S compatible.)
e D3,D2:DIF[1],DIF[0] SDIN1,SDIN2,SDIN3,SDIN4 Input mode selector
Mode
DIF[1]
DIF[0]
0
0
0
MSB justified (24bit)
1
0
1
LSB justified (24bit)
2
1
0
LSB justified (20bit)
3
1
1
LSB justified (16bit)
2
Note) When D4 = 1, the state is I S compatible, DIF[1:0] Mode 0 should be set.
This setting has no relation with ADC1, ADC2 and ADCM connection. When SWSDIN1=0, SWSDIN2_N=1, SWSDIN3_N=1
and SWSDIN4_N=1, then it will be MSB justified 24-bit compatible format independent of DIF1 and DIF0 setting.
f D1: SETCK
Select output clock of the CLKO when the condition of CONT6 CLKS Mode 3.
CONT0
DFS[2:0]
DFS Mode
0
1
2
3
4
SETCK=0
256fs
N/A
N/A
256fs
1024fs
SETCK=1
64fs
64fs
32fs
64fs
256fs
g D0: Always 0
When inputs D0, CONT0 setting is fixed.
5
N/A
256fs
6
512fs
128fs
7
1024fs
256fs
Note) Underline of the settings with “_” mean default setting.
[MS0369-E00]
- 26 -
2004/12