AK4128A Datasheet, PDF (46/50 Pages) Asahi Kasei Microsystems – 8ch 216kHz / 24-Bit Asynchronous SRC

[AK4128A]
1. Grounding and Power Supply Decoupling
The AK4128A requires careful attention to power supply and grounding arrangements. Alternatively if AVDD and
DVDD1-4 are supplied separately, the power up sequence is not critical. VSS1-5 must be connected to the same
ground plane. Decoupling capacitors should be as near to the AK4128A as possible, with the small value ceramic
capacitor being the nearest.
2. Jitter Tolerance
Figure 50 shows the jitter tolerance to ILRCK1-4 and IBICK. The jitter quantity is defined by the jitter frequency and the
jitter amplitude shown in Figure 50. When the jitter amplitude is 0.02Uipp or less, the AK4128A operates normally
regardless of the jitter frequency.
A
Figure 50. Jitter Tolerance
(1) Normal Operation
(2) There is a possibility that the output data is lost.
Note
▪ Y axis is the jitter amplitude of ILRCK1-4 just before THD+N degradation starts.
1UI (Unit Interval) is one cycle of IBICK. When FSI = 48kHz, 1[UIpp]=1/48kHz=20.8μs
MS1242-E-00
- 46 -
2010/09