AK4128A Datasheet, PDF (17/50 Pages) Asahi Kasei Microsystems – 8ch 216kHz / 24-Bit Asynchronous SRC

[AK4128A]
• Stereo Mode and Slave Mode
1/FSO
OLRCK(I)
tLRCH
tBCK
OBICK(I)
tBCKH
tLRCL
VIH
VIL
Duty
= tLRCH (or tLRCL) x FSO x 100
VIH
VIL
tBCKL
• TDM256 Mode and Slave Mode
1/FSO
VIH
OLRCK(I)
VIL
tLRH
tLRL
tBCK
VIH
OBICK(I)
VIL
tBCKH
tBCKL
Figure 7. OLRCK, OBICK, Clock Timing (Slave Mode)
• Stereo Mode and Master Mode
1/FSO
OLRCK(O)
tLRCH
tLRCL
1/ fBCK
50%DVDD
Duty
= tLRCH (or tLRCL) x FSO x 100
OBICK(O)
tBICKH
tBICKL
• TDM256 Mode and Master Mode
1/FSO
OLRCK(O)
24bit MSB justified
tLRH
1/FSO
OLRCK(O)
24bit I²S
tLRL
1/ fBCK
50%DVDD
dBCK
= tBICKH(or tBICKL) x fBCK x 100
50%DVDD
50%DVDD
OBICK(O)
tBICKH
tBICKL
50%DVDD
dBCK
= tBICKH(or tBICKL) x fBCK x 100
Figure 8. OLRCK, OBICK, Clock Timing (Master Mode)
MS1242-E-00
- 17 -
2010/09