AK4128A Datasheet, PDF (39/50 Pages) Asahi Kasei Microsystems – 8ch 216kHz / 24-Bit Asynchronous SRC

[AK4128A]
1-3. ACKNOWLEDGE
ACKNOWLEDGE is a software convention used to indicate successful data transfers. The transmitter will release the SDA
line (HIGH) after transmitting eight bits. The receiver must pull down the SDA line during the acknowledge clock pulse so
that that it remains stable “L” during “H” period of this clock pulse. The AK4128A generates an acknowledge after each
byte is received.
In read mode, the slave, the AK4128A transmits eight bits of data, release the SDA line and monitor the line for an
acknowledge. If an acknowledge is detected and no STOP condition is generated by the master, the slave will continue
transmitting data. If an acknowledge is not detected, the slave will terminate further data transmissions and await the STOP
condition.
Clock pulse
for acknowledge
SCL FROM
MASTER
1
8
9
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
START
CONDITION
Figure 41. Acknowledge on the I²C-bus
not acknowledge
acknowledge
1-4. FIRST BYTE
The first byte, which includes seven bits of slave address and one bit of R/W bit, is sent after a START condition. If the
transmitted slave address matches an address for one of the device, the receiver who has been addressed pulls down the
SDA line.
The first six bits of the slave address are fixed as “001001”. The next (seventh) bit is CAD0 (device address bits). It is “0”
when the CAD0 pin = “L”, and “1” when the CAD pin = “H”. This bit identifies the specific device on the bus. When the
slave address is input, the matched device generates an acknowledge and executes a command. The eighth bit (R/W bit) of
the first byte defines whether the master requests a write or read condition. A “1” indicates that the read operation is to be
executed. A “0” indicates that the write operation is to be executed.
0
0
1
0
0
1 CAD0 R/W
Figure 42. The First Byte
MS1242-E-00
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2010/09