AK61584 Datasheet, PDF (4/38 Pages) Asahi Kasei Microsystems – Dual Low Power T1/E1 Line Interface

ASAHI KASEI
[AK61584]
DIGITAL CHARACTERISTICS (TA=-40 to 85^oC;power supply pins within +/-5% of nominal)
Parameter
Symbol Min
Typ
High-Level input Voltage
(Note 7)
VIH (DV+)-0.5 -
Low-Level input Voltage
(Note 7)
VIL
-
-
High-Level Output Voltage
(Note 8)
VOH (DV+)-0.3 -
IOUT=-40uA
Low-Level Output Voltage
(Note 8)
VOL
-
-
IOUT=1.6mA
Input Leakage Current
-
-
(Digital pins except INT, J_TMS, and J_TDI)
Notes: 7. Digital inputs are designed for CMOS logic levels.
8. Digital outputs are TTL compatible and drive CMOS levels into a CMOS load.
Max Units
-
V
0.5
V
-
V
0.4
V
+/-10 uA
ANALOG SPECIFICATIONS (TA=-40 to 85^oC;power supply pins within +/-5% of nominal)
Parameter
Min Typ Max Units
Receiver
Input Impedance between RTIP/RRING
-
20k
-
ohm
Sensitivity Below DSX-1(0 dB=2.4V)
-13.6 -
-
DB
Loss of signal threshold, Short Haul
T1
-
0.23
-
V0p
E1
-
0.15
-
V0p
Data Decision Threshold T1,DSX-1
(Note 9)
60
65
70
(Note 10)
55
-
75
% of
E1
(Note 11)
45
50
55
Peak
(Note 12)
40
-
60
Allowable Consecutive Zeros before LOS
160 175 190
bits
Receiver Input Jitter
10 Hz and below
(Note 13)
300
-
-
UIpp
Tolerance(DSX-1,E1)
2 kHz
6.0
-
-
UIpp
10 kHz-100 kHz
0.4
-
-
UIpp
Jitter Attenuator
Jitter Attenuation Curve Corner Frequency (Note 14 and 15)
T1
-
4
-
Hz
E1
-
5.5
-
Hz
Attenuation at 10 kHz Jitter frequency (Note 14 and 15)
-
60
-
dB
Attenuator Input Jitter Tolerance
(Note 14)
28
43
-
UIpp
(Before Onset of FIFO Overflow or Underflow Protection)
Notes: 9. For input amplitude of 1.2Vpk to 4.14Vpk
10. For input amplitude of 0.5Vpk to 1.2Vpk, and 4.14Vpk to 5.0Vpk
11. For input amplitude of 1.07Vpk to 4.14Vpk
12. For input amplitude of 4.14Vpk to 5.0Vpk
13. Jitter tolerance increases at lower frequencies. See Figure 11.
14. Not production tested. parameters guaranteed by design and characterization.
15. Attenuation measured with sinusoidal input jitter equal to 3/4 of measured jitter tolerance.
Circuit attenuates jitter at 20 dB/decade above the corner frequency. See Figure 16. Output jitter
can increase significantly when more than 28 UI’s are input to the attenuator. See discussion in
jitter Attenuator section.
0185-E-00
-4-
‘98/04