AK5406 Datasheet, PDF (24/37 Pages) Asahi Kasei Microsystems – 80MSPS Triple ADC for Displays

ASAHI KASEI
[AK5406]
Description of Register Contents
Sub Address 00H CHIP ID
When it is read, device ID number (ADH) is returned.
Default value is meshed
Sub Address 01H ~ 02H PLL DIV Default : 69DH
01H
02H
Decimal
PLL multiplier ratio
[7:0]
[7:4]
notation of 01H
[7:0]&02H [7:4]
00H
0H
0
00H
1H
1
:
:
:
Inhibited
0DH
DH
221
0DH
EH
222
223
0DH
FH
223
224
0EH
0H
224
225
:
:
:
:
FFH
FH
4095
4096
“set-value plus one” becomes multiplier ratio of PLL.
Write operation of MSB side bits ( sub address 01H ) does not initiate PLL operation,
and after LSB side data ( sub address 02H ) is written, a multiplier ratio becomes
valid and PLL operation is executed.
Sub Address 03H
[7:6] PLL VCO
[7:6]
00
01
10
11
PLL VCO operating range
9~32MHz
32~64MHz
64~80MHz
Inhibited
[5:3] PLL CP
[5:3]
000
001
010
011
100
101
110
111
PLL charge pump current
50uA
100uA
150uA
250uA
350uA
500uA
750uA
Inhibited
MS0592-E-01
24
2008/07