DSP16411 Datasheet, PDF (216/316 Pages) Agere Systems – DSP16411 Digital Signal Processor

DSP16411 Digital Signal Processor
Data Sheet
May 2003
6 Software Architecture (continued)
6.1 Instruction Set Quick Reference (continued)
Table 133. Instruction Set Summary (continued)
Instruction
Data Move and Pointer Arithmetic Group
RAB = IM20
RA = IM4
RAD = RAS
if CON RABD = RABS
RB = aTE〈h,l〉
aTE〈h,l〉 = RB
RA = Y
Y = RA
RAB = YE
YE = RC
RAB = *sp++2
*sp––2 = RC
sp– –2
*sp = RC
push RC
pop RAB
r3– –sizeof(RAB)
RA = *(sp+IM5)
*(sp+IM5) = RA
RAB = *(RP+IM12)
*(RP+IM12) = RC
RAB = *(RP+〈j,k〉)
*(RP+〈j,k〉) = RC
RY = RP+IM12
RY = RP+〈j,k〉
RAB = *r7
r7 = sp+IM11
*r7 = RC
r7 = sp+IM11
YE^‡ = xh
xh = XE
Flags
szlme
Cycles
Out
In
Words
—
1
1
2
—
1
1
1
—
1
1
1
—
2
—
1
1
1
—
—
1
1
1
—
—
1
1
2
—
—
1
1
1
—
—
—
—
—
—
2
2
1
—
—
2
2
2
—
—
—
—
1
1
2
—
—
1
1
2
—
—
1 + XC^†
1
2
† XC is one cycle if XAAU contention occurs and zero cycles otherwise. XAAU contention occurs frequently for these instruc-
tion types and can only be avoided by use of the cache.
‡ For this transfer, the postincrement options *rME and *rME–– are not available for double-word loads.
§ The – (40-bit subtraction) operation is encoded as aDE =aSE +IM16 with the IM16 value negated.
†† For conditional branch instructions, the execution time is two cycles if the branch is not taken.
‡‡ The instruction performs the same function whether or not near (optional) is included.
§§ Not including the N instructions.
216
Agere Systems—Proprietary
Agere Systems Inc.
Use pursuant to Company instructions