Z87100 Datasheet, PDF (6/48 Pages) Zilog, Inc. – Wireless Transmitter

Z87100
Wireless Transmitter
DC ELECTRICAL CHARACTERISTICS (Continued)
Zilog
Sym
I_OL
I_CC
I_CC1
Parameter
Output
Leakage
V_CC
3.0V
5.5V
Supply Current
Standby
Current
(HALT mode)
3.0V
5.5V
4.5V
3.0V
5.5V
3.0V
5.5V
I_CC2
Standby
Current
3.0V
5.5V
(STOP mode)
3.0V
5.5V
T_A= 0°C to +70°C
Min
Max
–1.0
1.0
–1.0
1.0
8.0
15
15
4.5
7.0
2.0
4.5
10
10
TBD
TBD
5.5V
12
T_POR
Power-On
3.0V
7
24
Reset
5.5V
3
13
V_LV
V_CC Low
Voltage
1.50
2.65
Notes:
1. V_LV increases as the temperature decreases.
2. All outputs unloaded, I/O pins floating,
inputs at either rail, TMBASE clock input grounded.
3. C_L1 = C_L2 = 100 pF
4. Same as note 2 except inputs at V_CC.
5. Low EMI oscillator selected; SCLK = RC1/2;
10 kHz external oscillator with the comparator not enabled 10 µA.
10 kHz external oscillator with the comparator enabled 310 µA
RC selected for WDT; 10 kHz RC oscillator
(corresponding to R = 1.2MΩ C~ 68 pF), comparator is off.
6. Z8 in STOP moderate off; Z8 in STOP mode; WDT off.
TMBASE selected; as Z8 system clock source
Time base counter enabled; V_CC = 5.5V.
7. Analog Comparator disabled
Typical
@ 25°C
4.5
9.0
10
2.0
4.0
1.0
2.5
1.0
3.0
160
200
5
13
7
2.1
Units
Conditions
Notes
µA V_IN = O_V, V_CC
µA _{VIN = OV, VCC}
mA @ 12 MHz
2,3
mA @ 12 MHz
2,3
µA 10 kHz; external RC
2,3
mA HALT mode V_IN=0_V, V_CC 2,3
mA _{@12 MHz}
HALT mode V_IN=0V,
2,3
V_CC @ 12 MHz
mA Clock Divide-by-16
2,3
mA @12 MHz
Clock Divide-by-16
2,3
@ 12 MHz
µA STOP mode V_IN = O_V,
4,7
µA _{VCC WDT is not Running}
STOP mode V_IN = O_V,
4,7
V_CC WDT is not Running
µA STOP mode V_IN = O_V,
4,7
µA _{VCC WDT is Running}
STOP mode V_IN = O_V,
4,7
V_CC WDT is Running
µA STOP mode;
6,7
TMBASE=32.768 kHz;
WDT is not Running
ms
ms
V 2 MHz max Ext. CLK
1
Freq.
3-6
PRELIMINARY
DS96WRL0700