Z87100 Datasheet, PDF (11/48 Pages) Zilog, Inc. – Wireless Transmitter

Zilog
Z87100
Wireless Transmitter
Port 3 (P36-P31). Port 3 is a 4-bit, CMOS-compatible port. ing, or both edge triggered interrupts (IRQ register bits 6
These four lines consist of two fixed inputs (P31, P33) and and 7). Access to Counter/Timer 1 is made through P31
two fixed outputs (P36-P35). P31 and P33 are standard (T_IN) and P36 (T_OUT).
CMOS inputs (no auto latch) and P35 and P36 are push-
3
pull outputs. An on-board comparator can process analog ^{When the PN modulator is enabled, P35 is automatically}
signals on P31 with reference to the voltage on P33, where ^{configured as the output for the PN spread data, and, if de-}
this analog function is enabled by programming Port 3 ^{sired, P36 may be programmed as the PN clock output}
Mode Register (bit 1). P31 is programmable as falling, ris- ^{(Figures 7 and 8).}
P36
P35
Z87100
P33
P31
Port 3
Port 3
(I/O or Control)
R247 = P3M
1 = Analog
D1
0 = Digital
P31 (AN1)
+
P33 (REF)
-
DIG.
AN.
IRQ2, TIN, P31 Data Latch
Stop Mode Recovery Source
IRQ1, P33 Data Latch
Figure 7. Port 3 Configuration (P31, P33)
DS96WRL0700
PRELIMINARY
3-11