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DS922 Datasheet, PDF (57/77 Pages) Xilinx, Inc – DC and AC Switching Characteristics
Kintex UltraScale+ FPGAs Data Sheet: DC and AC Switching Characteristics
X-Ref Target - Figure 6
+V
P
N
0
X-Ref Target - Figure 7
+V
Figure 6: Single-Ended Peak-to-Peak Voltage
Single-Ended
Peak-to-Peak
Voltage
ds922_03_080415
Differential
0
Peak-to-Peak
Voltage
–V
P–N
Differential peak-to-peak voltage = (Single-ended peak-to-peak voltage) x 2
Figure 7: Differential Peak-to-Peak Voltage
ds922_04_080415
Table 65 summarizes the DC specifications of the clock input of the GTY transceivers in Kintex UltraScale+
FPGAs. Consult www.xilinx.com/products/technology/high-speed-serial for further details.
Table 65: GTY Transceiver Clock DC Input Level Specification
Symbol
DC Parameter
VIDIFF
RIN
CEXT
Differential peak-to-peak input voltage
Differential input resistance
Required external AC coupling capacitor
Min
250
–
–
Typ
–
100
10
Max
2000
–
–
Units
mV
Ω
nF
Table 66: GTY Transceiver Clock Output Level Specification
Symbol
Description
Conditions
VOL
VOH
VDDOUT
Output high voltage for P and N
Output low voltage for P and N
Differential output voltage
(P–N), P = High
(N–P), N = High
RT = 100Ω across P and N signals
RT = 100Ω across P and N signals
RT = 100Ω across P and N signals
VCMOUT Common mode voltage
RT = 100Ω across P and N signals
Min
–
–
–
–
Typ
Max
–
–
Units
mV
mV
–
mV
–
mV
DS922 (v1.1) May 9, 2016
Advance Product Specification
www.xilinx.com
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