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DS922 Datasheet, PDF (11/77 Pages) Xilinx, Inc – DC and AC Switching Characteristics
Kintex UltraScale+ FPGAs Data Sheet: DC and AC Switching Characteristics
Power Supply Requirements
Table 7 shows the minimum current, in addition to ICCQ, that are required by the Kintex UltraScale+ FPGAs
for proper power-on and configuration. If the current minimums shown in Table 6 and Table 7 are met, the
device powers on after all supplies have passed through their power-on reset threshold voltages. The
device must not be configured until after VCCINT is applied. Once initialized and configured, use the Xilinx
Power Estimator (XPE) tools to estimate current drain on these supplies.
Table 7: Power-on Current by Device
Device
XCKU3P
XCKU5P
XCKU9P
XCKU11P
XCKU13P
XCKU15P
ICCINTMIN
ICCINTQ + 770
ICCINTQ + 770
ICCINTQ + 1800
ICCINTQ + 1961
ICCINTQ + 2242
ICCINTQ + 3433
ICCINT_IOMIN + ICCBRAMMIN
ICCBRAMQ + ICCINT_IOQ + 229
ICCBRAMQ + ICCINT_IOQ + 305
ICCBRAMQ + ICCINT_IOQ + 600
ICCBRAMQ + ICCINT_IOQ + 654
ICCBRAMQ + ICCINT_IOQ + 748
ICCBRAMQ + ICCINT_IOQ + 1145
ICCOMIN
ICCOQ + 50
ICCOQ + 50
ICCOQ + 50
ICCOQ + 55
ICCOQ + 63
ICCOQ + 96
ICCAUXMIN + ICCAUX_IOMIN
ICCAUXQ + ICCAUX_IOQ + 386
ICCAUXQ + ICCAUX_IOQ + 515
ICCAUXQ + ICCAUX_IOQ + 650
ICCAUXQ + ICCAUX_IOQ + 709
ICCAUXQ + ICCAUX_IOQ + 810
ICCAUXQ + ICCAUX_IOQ + 1240
Units
mA
mA
mA
mA
mA
mA
Table 8 shows the power supply ramp time.
Table 8: Power Supply Ramp Time
Symbol
Description
TVCCINT
TVCCINT_IO
TVCCO
TVCCAUX
TVCCBRAM
TMGTAVCC
TMGTAVTT
TMGTVCCAUX
Ramp time from GND to 95% of VCCINT.
Ramp time from GND to 95% of VCCINT_IO.
Ramp time from GND to 95% of VCCO.
Ramp time from GND to 95% of VCCAUX.
Ramp time from GND to 95% of VCCBRAM.
Ramp time from GND to 95% of VMGTAVCC.
Ramp time from GND to 95% of VMGTAVTT.
Ramp time from GND to 95% of VMGTVCCAUX.
Min
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
Max
40
40
40
40
40
40
40
40
Units
ms
ms
ms
ms
ms
ms
ms
ms
DS922 (v1.1) May 9, 2016
Advance Product Specification
www.xilinx.com
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