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DS922 Datasheet, PDF (22/77 Pages) Xilinx, Inc – DC and AC Switching Characteristics
Kintex UltraScale+ FPGAs Data Sheet: DC and AC Switching Characteristics
IOB Pad Input, Output, and 3-State
Table 27 (high-density IOB (HD)) and Table 28 (high-performance IOB (HP)) summarizes the values of
standard-specific data input delay adjustments, output delays terminating at pads (based on standard)
and 3-state delays.
• TINBUF_DELAY_PAD_I is the delay from IOB pad through the input buffer to the I-pin of an IOB pad. The
delay varies depending on the capability of the SelectIO input buffer.
• TOUTBUF_DELAY_O_PAD is the delay from the O pin to the IOB pad through the output buffer of an IOB
pad. The delay varies depending on the capability of the SelectIO output buffer.
• TOUTBUF_DELAY_TD_PAD is the delay from the T pin to the IOB pad through the output buffer of an IOB
pad, when 3-state is disabled. The delay varies depending on the SelectIO capability of the output
buffer. In HP I/O banks, the internal DCI termination turn-on time is always faster than
TOUTBUF_DELAY_TD_PAD when the DCITERMDISABLE pin is used. In HD I/O banks, the on-die termination
turn-on time is always faster than TOUTBUF_DELAY_TD_PAD when the INTERMDISABLE pin is used.
Table 27: IOB High Density (HD) Switching Characteristics
I/O Standards
TINBUF_DELAY_PAD_I
0.90V 0.85V
0.72V
TOUTBUF_DELAY_O_PAD
0.90V 0.85V
0.72V
TOUTBUF_DELAY_TD_PAD
0.90V 0.85V
0.72V
Units
-3
-2 -1 -2 -1
-3
-2 -1 -2 -1
-3
-2 -1 -2 -1
DIFF_HSTL_I_18_F 0.569 0.577 0.638 0.577 0.558 1.359 1.452 1.587 1.452 1.456 1.359 1.452 1.587 1.452 1.456 ns
DIFF_HSTL_I_18_S 0.569 0.577 0.638 0.577 0.558 1.359 1.452 1.587 1.452 1.456 1.359 1.452 1.587 1.452 1.456 ns
DIFF_HSTL_I_F
0.566 0.56 0.633 0.56 0.552 1.464 1.575 1.725 1.575 1.574 1.464 1.575 1.725 1.575 1.574 ns
DIFF_HSTL_I_S
0.566 0.56 0.633 0.56 0.552 1.464 1.575 1.725 1.575 1.574 1.464 1.575 1.725 1.575 1.574 ns
DIFF_HSUL_12_F
0.562 0.547 0.599 0.547 0.522 1.395 1.508 1.634 1.508 1.506 1.395 1.508 1.634 1.508 1.506 ns
DIFF_HSUL_12_S
0.562 0.547 0.599 0.547 0.522 1.395 1.508 1.634 1.508 1.506 1.395 1.508 1.634 1.508 1.506 ns
DIFF_SSTL12_F
0.566 0.552 0.609 0.552 0.522 1.463 1.561 1.704 1.561 1.555 1.463 1.561 1.704 1.561 1.555 ns
DIFF_SSTL12_S
0.566 0.552 0.609 0.552 0.522 1.707 1.747 1.909 1.747 1.716 1.707 1.747 1.909 1.747 1.716 ns
DIFF_SSTL135_F
0.577 0.560 0.613 0.56 0.527 1.473 1.590 1.728 1.590 1.585 1.473 1.590 1.728 1.590 1.585 ns
DIFF_SSTL135_II_F 0.577 0.560 0.613 0.56 0.527 1.406 1.498 1.636 1.498 1.491 1.406 1.498 1.636 1.498 1.491 ns
DIFF_SSTL135_II_S 0.577 0.560 0.613 0.56 0.527 1.576 1.649 1.789 1.649 1.618 1.576 1.649 1.789 1.649 1.618 ns
DIFF_SSTL135_S
0.577 0.560 0.613 0.56 0.527 1.817 1.887 2.046 1.887 1.846 1.817 1.887 2.046 1.887 1.846 ns
DIFF_SSTL15_F
0.566 0.560 0.633 0.56 0.552 1.474 1.592 1.734 1.592 1.597 1.474 1.592 1.734 1.592 1.597 ns
DIFF_SSTL15_II_F 0.566 0.560 0.633 0.56 0.552 1.406 1.511 1.659 1.511 1.505 1.406 1.511 1.659 1.511 1.505 ns
DIFF_SSTL15_II_S 0.566 0.560 0.633 0.56 0.552 1.618 1.700 1.856 1.700 1.668 1.618 1.700 1.856 1.700 1.668 ns
DIFF_SSTL15_S
0.566 0.560 0.633 0.56 0.552 1.734 1.804 1.957 1.804 1.775 1.734 1.804 1.957 1.804 1.775 ns
DIFF_SSTL18_II_F 0.569 0.577 0.638 0.577 0.558 1.357 1.473 1.604 1.473 1.469 1.357 1.473 1.604 1.473 1.469 ns
DIFF_SSTL18_II_S 0.569 0.577 0.638 0.577 0.558 1.511 1.629 1.784 1.629 1.616 1.511 1.629 1.784 1.629 1.616 ns
DIFF_SSTL18_I_F
0.569 0.577 0.638 0.577 0.558 1.335 1.431 1.563 1.431 1.429 1.335 1.431 1.563 1.431 1.429 ns
DIFF_SSTL18_I_S 0.569 0.577 0.638 0.577 0.558 1.692 1.802 1.961 1.802 1.760 1.692 1.802 1.961 1.802 1.760 ns
HSTL_I_18_F
0.596 0.606 0.668 0.606 0.571 1.359 1.452 1.587 1.452 1.456 1.359 1.452 1.587 1.452 1.456 ns
HSTL_I_18_S
0.596 0.606 0.668 0.606 0.571 1.359 1.452 1.587 1.452 1.456 1.359 1.452 1.587 1.452 1.456 ns
HSTL_I_F
0.597 0.601 0.604 0.601 0.566 1.464 1.575 1.725 1.575 1.574 1.464 1.575 1.725 1.575 1.574 ns
HSTL_I_S
0.597 0.601 0.604 0.601 0.566 1.464 1.575 1.725 1.575 1.574 1.464 1.575 1.725 1.575 1.574 ns
HSUL_12_F
0.604 0.598 0.615 0.598 0.538 1.395 1.508 1.634 1.508 1.506 1.395 1.508 1.634 1.508 1.506 ns
HSUL_12_S
0.604 0.598 0.615 0.598 0.538 1.395 1.508 1.634 1.508 1.506 1.395 1.508 1.634 1.508 1.506 ns
DS922 (v1.1) May 9, 2016
Advance Product Specification
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