DS922 Datasheet, PDF (40/77 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Kintex UltraScale+ FPGAs Data Sheet: DC and AC Switching Characteristics
Table 41: Global Clock Input to Output Delay With MMCM
Symbol
Description
Device
Speed Grade and
V_CCINT Operating Voltages
0.90V
0.85V
0.72V
Units
-3
-2
-1
-2
-1
SSTL15 Global Clock Input to Output Delay using Output Flip-Flop, Fast Slew Rate, with MMCM.
T_ICKOFMMCMCC Global clock input and output
flip-flop with MMCM.
XCKU3P
XCKU5P
2.33
2.33
2.44
2.44
2.62
2.62
2.84 2.89
ns
2.84 2.89
ns
XCKU9P 2.75 2.82
3.01
3.49 3.43
ns
XCKU11P 2.64 2.80
3.04
3.23 3.39
ns
XCKU13P 2.77 2.82
3.08
3.43 3.53
ns
XCKU15P 2.78 2.99
3.25
3.39 3.64
ns
Notes:
1. This table lists representative values where one global clock input drives one vertical clock line in each accessible column,
and where all accessible I/O and CLB flip-flops are clocked by the global clock net in a single SLR.
2. MMCM output jitter is already included in the timing calculation.
DS922 (v1.1) May 9, 2016
Advance Product Specification
www.xilinx.com
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