DS587 Datasheet, PDF (2/20 Pages) Xilinx, Inc – Selectable ADC resolution

XPS Delta-Sigma Analog to Digital Converter (ADC) (v1.01a)
Functional Description
The modules comprising the XPS ADC are shown in Figure 1 and described in the subsequent sections.
The XPS ADC modules are:
• Interrupt Controller
• PLB Interface Module
• IPIC Interface
• ADCout Data FIFO
• Delta-Sigma DAC
• ADC
X-Ref Target - Figure 1
XPS ADC
AgtR
ADC Top Module
IP2INTC_Irpt
Interrupt IP2Bus_intr
Controller
ADC
Delta_Sigma
DAC
DACout
PLB v46
PLB
Module
Interface
IPIC
Interface
Sample
ADCout
Data FIFO
Figure 1: XPS ADC Block Diagram
DS587_01_090809
Interrupt Controller: The Interrupt Controller provides interrupt capture support for XPS ADC. The
Interrupt Controller is used to collect interrupts from XPS ADC by which XPS ADC requests the
attention of the microprocessor.
PLB Interface Module: The PLB Interface Module is a bi-directional interface between a user IP core
and the PLB bus standard. To simplify the process of attaching a XPS ADC to the PLB, the core makes
use of a portable, pre-designed bus interface called PLB Interface Module, that takes care of the bus
interface signals, bus protocols and other interface issues.
IPIC Interface: The IPIC is a simple set of signals that connects the XPS ADC to the PLB Interface
Module. This module generates the required read and write request signals by using the output signals
of the FIFO.
ADCout Data FIFO: The ADCout Data FIFO is a 16-bit wide, 16 entry deep FIFO for storing the
converted analog values, i.e., a FIFO to store the ADCout values. The FIFO Non-empty signal
2
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DS587 December 2, 2009
Product Specification