DS587 Datasheet, PDF (17/20 Pages) Xilinx, Inc – Selectable ADC resolution

XPS Delta-Sigma Analog to Digital Converter (ADC) (v1.01a)
The XPS ADC resource utilization for various parameter combinations measured with Spartan-6 as the
target device are detailed in Table 17.
Table 17: Performance and Resource Utilization Benchmarks on Spartan-6(xc6slx45-2-fgg676)
Parameter Values
Device Resources
Performance
Slices
Slice
Flip-Flops
LUTs
F_MAX (MHz)
11
8
96
158
204
101.35
11
6
112
154
211
100.64
11
4
86
149
178
107.47
9
8
111
147
190
101.64
9
6
88
142
174
100.47
9
4
87
138
165
105.08
System Performance
To measure the system performance (Fmax) of this core, this core was added to a Virtex-4 FPGA system,
a Virtex-5 FPGA system, and a Spartan-3A FPGA system as the Device Under Test (DUT) as shown in
Figure 11, Figure 12, and Figure 13.
Because the XPS Delta-Sigma ADC core will be used with other design modules in the FPGA, the
utilization and timing numbers reported in this section are estimates only. When this core is combined
with other designs in the system, the utilization of FPGA resources and timing of the core design will
vary from the results reported here.
X-Ref Target - Figure 11
PLBV46
PLBV46
MPMC5
Device Und
XPS CDMA XPS CDMA _{Test (DUT}
IPLB1 DPLB1
PowerPC ^® 405 ^DPLB0
Processor
IPLB0
PLBV46
XPS BRAM XPS INTC
Figure 11: Virtex-4 FX System
XPS GPIO
XPS UA
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DS587_11
DS587 December 2, 2009
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Product Specification