DS707 Datasheet, PDF (1/20 Pages) Xilinx, Inc – Configurable as single or dual port PS2 controller

DS707 April 19, 2010
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LogiCORE IP XPS PS2
Controller (v1.01b)
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Product Specification
Introduction
The LogiCORE IP XPS PS2 Controller is a PLB
(Processor Local Bus) slave that is designed to control
PS2 devices such as keyboard and mouse. The PS2
protocol is a simple bidirectional serial protocol.
Features
• Connects as a 32-bit slave on PLB V4.6 bus of 32, 64
or 128 bit data width
• Configurable as single or dual port PS2 controller
• Supports two PS2 devices, each controlled by
separate set of eight byte-wide registers
• Two separate interrupts for each of the ports
LogiCORE™ Facts
Supported Device
Family
Core Specifics
Spartan^®-6, Virtex^®-6/-6CX,
Spartan-3, Spartan-3A, Spartan-3E,
Automotive Spartan-3/3E/3A/3A
DSP, Spartan-3 ADSP, Virtex-4,
QVirtex-4, QRVirtex-4,Virtex-5/5FX
Version of Core
xps_ps2
v1.01b
Resources Used
Min
Max
SLICES
LUTs
FFs
See Table 14, Table 15, Table 16,
Table 17, and Table 18
Block RAMs
N/A
Special Features
N/A
Provided with Core
Documentation
Product Specification
Design File Formats VHDL
Constraints File
N/A
Verification
N/A
Instantiation Template N/A
Reference Designs &
Application notes
N/A
Design Tool Requirements
Xilinx Implementation
Tools
ISE 12.1
Verification
MentorGraphics ModelSim 6.5c
and above
Simulation
MentorGraphics ModelSim 6.5c
and above
Synthesis
XST
Support
Provided by Xilinx, Inc.
© Copyright 2007-2010 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United
States and other countries. All other trademarks are the property of their respective owners.
DS707 April 19, 2010
www.xilinx.com
1
Product Specification