W925E240 Datasheet, PDF (15/73 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925E/C240
IE0: Interrupt 0 edge detects: Set by hardware when an edge/level is detected on INT0 . This bit is
cleared by hardware when the service routine is vectored to only if the interrupt was edge
triggered. Otherwise, it follows the pin.
IT0: Interrupt 0 type control. Set/cleared by software to specify falling edge/ low level triggered
external inputs.
TIMER MODE CONTROL
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
GATE _{C/ T}
M1
M0 GATE _{C/ T}
M1
M0
Mnemonic: TMOD
Address: 89h
Bit7~4 control timer 1, bit3~0 control timer0
GATE: Gating control. When this bit is set, Timer x is enabled only while INTx pin is high and TRx
control bit is set. When cleared, Timer x is enabled whenever TRx control bit is set.
C/ T : Timer or Counter Select. When cleared, the timer is incremented by internal clocks. When set,
the timer counts high-to-low edges of the Tx pin.
Note: X is either 0 or 1.
M1, M0: Mode Select bits:
M1 M0 Mode
0 0 Mode 0: 13-bits timer
0 1 Mode 1: 16-bits timer
1 0 Mode 2: 8-bits with auto-reload from Thx
1 1 Reserved
TIMER 0 LOW BYTE
Bit:
7
6
TL0.7 TL0.6
Mnemonic: TL0
TL0.7-0: Timer 0 low byte register.
TIMER 1 LOW BYTE
Bit:
7
6
TL1.7 TL1.6
Mnemonic: TL1
TL1.7-0: Timer 1 low byte register.
5
TL0.5
5
TL1.5
4
TL0.4
4
TL1.4
(initial=00H)
3
2
1
TL0.3 TL0.2 TL0.1
Address: 8Ah
(initial=00H)
3
2
1
TL1.3 TL1.2 TL1.1
Address: 8Bh
0
TL0.0
0
TL1.0
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Publication Release Date: July 12, 2005
Revision A10