W925E240 Datasheet, PDF (12/73 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925E/C240
6.2 Special Function Registers
The W925E/C240 uses Special Function Registers (SFRs) to control and monitor peripherals and their
Modes.
The SFRs reside in the register locations 80-FFh and accessed by direct addressing only. Some of the
SFRs are bit addressable. This is very useful in cases where one wishes to modify a particular bit
without changing the others. The SFRs that are bit addressable are those whose addresses end in 0
or 8. The list of SFRs is as follows. The table is condensed with eight locations per row. Empty
locations indicate that there are no registers at these addresses. The content of reserved bits or
registers is not guaranteed.
Table 1 Special Function Register Location Table
F8 EIP
CIDGD CIDGA
F0 B
E8 EIE
E0 ACC
D8 WDCON
D0 PSW
C8 DIVC
C0 SCON1 SBUF1 REGVC
PMR
B8 IP
DTMFG COMPR IRC1
B0 P3
CIDR
CIDFG CIDPCR FSKDR
A8 IE
A0 P2
HB
P4H
98
P1EF
90 P1
EXIF
RPAGE P1SR
P0IO
88 TCON TMOD TL0
TL1
TH0
80 P0
SP
DPL
DPH
DPL1
Note: The SFRs in the column with dark borders are bit-addressable.
STATUS
IRC2
DTMFDR
P1H
P1IO
TH1
DPH1
FSKTC
CASPT
DTMFPT
P4IO
P4
P2H
P2IO
CKCON1
DPS
FSKTB
CASAT
DTMFAT
P3H
P3IO
CKCON2
PCON
A brief description of the SFRs now follows.
PORT 0
(initial=FFh, input mode)
Bit:
7
6
5
4
3
2
1
0
P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0
Mnemonic: P0
Address: 80h
P0: P0 can be selected as input or output mode by the P0IO register. At initial reset, P0IO is set to
FFH, P0 is used as input mode. When P0IO is set to 0, the P0 is used as CMOS open drain
mode.
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