W925E240 Datasheet, PDF (14/73 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925E/C240
DATA POINTER SELECT
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
DPS.0
Mnemonic: DPS
Address: 86h
DPS.0: This bit is used to select either the DPL,DPH pair or the DPL1,DPH1 pair as the active Data
Pointer. When set to 1, DPL1,DPH1 will be selected, otherwise DPL,DPH will be selected.
DPS.1-7: These bits are reserved, but will read 0.
POWER CONTROL
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
-
-
-
IDLT GF1 GF0
PD
IDL
IDLT:
GF1-0:
PD:
IDL:
Mnemonic: PCON
Address: 87h
This bit controls the idle mode type. In idle mode when idle mode is released by any
interrupt, if IDLT=1 it will not jump to the corresponding interrupt; if IDLT=0 it will jump to the
corresponding interrupt.
These two bits are general-purpose user flags.
Setting this bit causes the W925E/C240 to go into the POWER DOWN mode. In this mode,
all the clocks are stopped and program execution is frozen. Power down mode can be
released by INT0~INT3 and ring detection of CID interrupt.
Setting this bit causes the W925E/C240 to go into the IDLE mode. The type of idle mode is
selected by IDLT. In this mode the clocks to the CPU are stopped, so program execution is
frozen. However, the clock path to the timers blocks and interrupt blocks is not stopped, and
these blocks continue operating.
TIMER CONTROL
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
TF1 TR1 TF0 TR0 IE1
IT1
IE0
IT0
Mnemonic: TCON
Address: 88h
TF1: Timer 1 overflows flag. This bit is set when Timer 1 overflows. It is cleared automatically when
the program does a timer 1 interrupt service routine. Software can also set or clear this bit.
TR1: Timer 1 runs control. This bit is set or cleared by software to turn timer on or off.
TF0: Timer 0 overflows flag. This bit is set when Timer 0 overflows. It is cleared automatically when
the program does a timer 0 interrupt service routine. Software can also set or clear this bit.
TR0: Timer 0 runs control. This bit is set or cleared by software to turn timer on or off.
IE1: Interrupt 1 edge detects: Set by hardware when an edge/level is detected on INT1. This bit is
cleared by hardware when the service routine is vectored to only if the interrupt was edge
triggered. Otherwise, it follows the pin.
IT1: Interrupt 1 type control: Set/cleared by software to specify falling edge/ low level triggered
external inputs.
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