W83637HF Datasheet, PDF (15/149 Pages) Winbond – LPC I/O

W83637HF
5.1 LPC Interface
SYMBOL
CLKIN
PIN I/O
18
IN_t
PME#
PCICLK
LDRQ#
SERIRQ
LAD[3:0]
LFRAME#
LRESET#
19
OD_12t
21
IN_ts
22
O_12t
23
I/O12t
24-27 I/O_12t
29
IN_ts
30
IN_ts
FUNCTION
System clock input. According to the input frequency 24MHz or
48MHz, it is selectable through register. Default is 24MHz input.
Generated PME event.
PCI clock input.
Encoded DMA Request signal.
Serial IRQ input/Output.
These signal lines communicate address, control, and data
information over the LPC bus between a host and a peripheral.
Indicates start of a new cycle or termination of a broken cycle.
Reset signal. It can connect to PCIRST# signal on the host.
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Publication Release Date: June 25, 2003
Revision 1.3