W83637HF Datasheet, PDF (130/149 Pages) Winbond – LPC I/O

W83637HF
CRF7 (Default 0x00)
Bit 7 : Reserved. Return zero when read
Bit 6 - 0 _{: Enable bits of the SMI / PME generation due to the GPIO IRQ function or device's IRQ.}
Bit 6 : SCIRQEN.
= 0 Disable the generation of an SMI / PME interrupt due to SC's IRQ.
Bit 5
= 1 Enable the generation of an SMI / PME interrupt due to SC's IRQ.
: HMIRQEN.
= 0 Disable the generation of an SMI / PME interrupt due to hardware monitor's IRQ.
Bit 4
= 1 Enable the generation of an SMI / PME interrupt due to hardware monitor's IRQ.
: WDTIRQEN.
= 0 Disable the generation of an SMI / PME interrupt due to watch dog timer's IRQ.
Bit 3
= 1 Enable the generation of an SMI / PME interrupt due to watch dog timer's IRQ.
: CIRIRQEN.
= 0 Disable the generation of an SMI / PME interrupt due to CIR's IRQ.
Bit 2
= 1 Enable the generation of an SMI / PME interrupt due to CIR's IRQ
: MIDIIRQEN.
= 0 Disable the generation of an SMI / PME interrupt due to MIDI's IRQ.
Bit 1
= 1 Enable the generation of an SMI / PME interrupt due to MIDI's IRQ.
: IRQIN1EN.
= 0 Disable the generation of an SMI / PME interrupt due to IRQIN1's IRQ.
Bit 0
= 1 Enable the generation of an SMI / PME interrupt due to IRQIN1's IRQ.
: IRQIN0EN.
= 0 Disable the generation of an SMI / PME interrupt due to IRQIN0's IRQ.
= 1 Enable the generation of an SMI / PME interrupt due to IRQIN0's IRQ.
- 125 -
Publication Release Date: June 25, 2003
Revision 1.3