W632GG8KB Datasheet, PDF (11/159 Pages) Winbond – 32M X 8 BANKS X 8 BIT DDR3 SDRAM

7. BLOCK DIAGRAM
CK, CK#
CKE
CLOCK
BUFFER
CS#
RAS#
CAS#
WE#
COMMAND
DECODER
CONTROL
SIGNAL
GENERATOR
A10
A0
MODE
REGISTER
ADDRESS
A9
BUFFER
A11
A12
A13
A14
BA2
BA1
BA0
REFRESH
COUNTER
COLUMN
COUNTER
ZQCL, ZQCS
ZQ
ZQ CAL
RZQ
VSSQ
To ODT/output drivers
COLUMN
DECODER
CELL ARRAY
BANK #0
SENSE
AMPLIFIER
COLUMN
DECODER
CELL ARRAY
BANK #2
SENSE
AMPLIFIER
COLUMN
DECODER
CELL ARRAY
BANK #1
SENSE
AMPLIFIER
COLUMN
DECODER
CELL ARRAY
BANK #4
PREFETCH REGISTER
DATA CONTROL CIRCUIT
DM MASK LOGIC
COLUMN
DECODER
CELL ARRAY
BANK #3
SENSE
AMPLIFIER
COLUMN
DECODER
CELL ARRAY
BANK #6
SENSE
AMPLIFIER
NOTE: The cell array configuration is 32768 * 1024 * 8
- 11 -
W632GG8KB
COLUMN
DECODER
CELL ARRAY
BANK #5
CK, CK#
ODT
DLL
DQ
BUFFER
READ
drivers
WRITE
drivers
DQ0−DQ7
DQ0−DQ7
DQS, DQS#
TDQS, TDQS#
ODT
DQS, DQS#
CONTROL ^{TDQS, TDQS#}
DM
DM
COLUMN
DECODER
CELL ARRAY
BANK #7
SENSE
AMPLIFIER
Publication Release Date: Jul. 28, 2014
Revision: A04