W3H32M72E-XSBX Datasheet, PDF (8/30 Pages) White Electronic Designs Corporation – 32M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package

White Electronic Designs
W3H32M72E-XSBX
PRELIMINARY*
FIGURE 4 – POWER-UP AND INITIALIZATION
Notes appear on page 9
VCC
VCCQ
VTT1
VREF
CK#
CK
t _VTD1
T0 _tCK
tCL tCL
LVCMOS SSTL_18
CKE LOW LEVEL⁸ LOW LEVEL⁸
ODT
COM M AND
DM ⁷
Ta0
Tb0
Tc0
Td0
Te0
Tf 0
Tg0
Th0
Ti0
Tj0
Tk0
NOP2
PRE
LM
LM
LM
LM
PRE
REF
REF
LM
LM
Tl0
Tm0
See
note
3
LM
VALID³
ADDRESS⁹
A10 = 1
CODE
CODE
CODE
CODE
A10 = 1
DQS⁷
DQ⁷
RT T
High-Z
High-Z
High-Z
T = 200µs (M IN)
Pow er-up:
VCC and st able
clock (CK, CK#)
T = 400ns
(M IN)
DON’T CARE
Indicat es a break in
t ime scale
t _RPA
t _{M RD}
t _{M RD}
EM R(2)
EM R(3)
t _{M RD}
t _{M RD}
t _RPA
EM R w it h
DLL ENABLE⁵
MR with
DLL RESET
CODE
CODE
CODE
VALID
t _RFC
t _RFC
t _{M RD}
t _{M RD}
t _{M RD}
See note 4
M R w /o
EM R w it h
EM R w it h
DLL RESET OCD Def ault ¹⁰ OCD Exit ¹¹
200 cycles of CK3
Normal
Operat ion
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
February 2006
Rev. 2
8
White Electronic Designs Corporation • [phone] • www.wedc.com