W3H32M72E-XSBX Datasheet, PDF (21/30 Pages) White Electronic Designs Corporation – 32M x 72 DDR2 SDRAM 208 PBGA Multi-Chip Package

White Electronic Designs
W3H32M72E-XSBX
PRELIMINARY*
FIGURE 12 – WRITE COMMAND
CK#
CK
CKE HIGH
CS#
RAS#
CAS#
WE#
ADDRESS
A10
BANK ADDRESS
CA
EN AP
DIS AP
BA
DON’T CARE
Note: CA = column address; BA = bank address; EN AP = enable auto precharge; and
DIS AP = disable auto precharge.
TABLE 4 – WRITE USING CONCURRENT AUTO PRECHARGE
From Command (Bank n)
WRITE with Auto Precharge
To Command (Bank m)
READ OR READ w/AP
WRITE or WRITE w/AP
PRECHARGE or ACTIVE
Minimum Delay (With Concurrent
Auto Precharge)
(CL-1) + (BL/2) + ^tWTR
(BL/2)
1
Units
t_CK
t_CK
t_CK
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
February 2006
Rev. 2
21
White Electronic Designs Corporation • [phone] • www.wedc.com