DAC8728_14 Datasheet, PDF (9/56 Pages) Texas Instruments – Octal, 16-Bit, Low-Power, High-Voltage Output, Parallel Input DIGITAL-TO-ANALOG CONVERTER

DAC8728
www.ti.com
SBAS466A – JUNE 2009 – REVISED NOVEMBER 2009
ELECTRICAL CHARACTERISTICS: Single-Supply (continued)
All specifications at T_A = T_MIN to T_MAX, AV_DD = +32V, AV_SS = 0V, DV_DD = +5V, REF-A and REF-B = +5V, gain = 6, AGND-x =
DGND = 0V, and OFFSET-A = OFFSET-B = AGND, unless otherwise noted.
DAC8728
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY
AV_DD
DV_DD
IOV_DD
AI_DD
Normal operation, midscale code, output unloaded
Power down, output unloaded
+9
+2.7
+1.7
4.5
35
+36
V
+5.5
V
DV_DD
V
7
mA
µA
DI_DD
Normal operation
Power down
75
μA
35
μA
IOI_DD
Power dissipation
Normal operation, V_IH = IOV_DD, V_IL = DGND
Power down, V_IH = IOV_DD, V_IL = DGND
Normal operation
5
μA
5
μA
144
224
mW
TEMPERATURE RANGE
Specified performance
–40
+105
°C
FUNCTIONAL BLOCK DIAGRAM
IOV_DD DGND DV_DD
AV_DD
AV_SS
REF-A
DAC8728
Analog Monitor
V_OUT-0
A0
A4
R/W
CS
D0
D15
RST
RSTSEL
LDAC
CLR
USB/BTC
BUSY
GPIO
Reference
Command
Buffer A
Registers
To DAC-0, DAC-1,
DAC-2, DAC-3
(When Correction Engine Disabled)
OFFSET
DAC A
V_OUT-7
Ref Buffer A
Ref Buffer B
OFFSET-B
Input Data
Register 0
Correction
Engine
User Calibration:
Zero Register 0
Gain Regsiter 0
DAC-0
Data
DAC-0
Latch-0
LDAC
To DAC-0, DAC-1,
DAC-2, DAC-3
Internal Trimming
Zero/Gain; INL
To DAC-4, DAC-5, DAC-6, DAC-7
(Same Function Blocks
for All Channels)
Reference
Buffer B
OFFSET
DAC B
Power-Up/
Power-Down
Control
V_MON
OFFSET-A
V_OUT-0
AGND-A
OFFSET-B
V_OUT-7
AGND-B
REF-B
Figure 1. Functional Block Diagram
Copyright © 2009, Texas Instruments Incorporated
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