DAC8728_14 Datasheet, PDF (11/56 Pages) Texas Instruments – Octal, 16-Bit, Low-Power, High-Voltage Output, Parallel Input DIGITAL-TO-ANALOG CONVERTER

DAC8728
www.ti.com
SBAS466A – JUNE 2009 – REVISED NOVEMBER 2009
PIN DESCRIPTIONS (continued)
PIN
NAME
LDAC
RST
A0
A1
DV_DD
DGND
A2
A3
A4
DGND
GPIO
RSTSEL
V_OUT-7
OFFSET-B
AV_SS
V_OUT-6
AGND-B
AV_DD
V_OUT-5
REF-B
V_OUT-4
NC
D0
D1
D2
D3
D4
D5
D6
DGND
IOV_DD
DV_DD
R/W
CS
D7
D8
D9
D10
D11
D12
PIN NO.
QFN-56
TQFP-64
17
18
18
19
19
20
20
21
21
24
22
25
23
26
24
27
25
29
26
30
27
33
28
34
29
36
30
37
31
38
32
39
33
40
34
41
35
42
36
43
37
44
14, 22, 23,
38
28, 31, 32,
35, 45, 53
39
46
40
47
41
48
42
49
43
50
44
51
45
52
46
54
47
55
48
56
49
57
50
58
51
59
52
60
53
61
54
62
55
63
56
64
I/O
DESCRIPTION
Load DAC latch control input (active low). When LDAC is low, the DAC latch is transparent and the
contents of the DAC Data Register are transferred to it. The DAC output changes to the corresponding
I level simultaneously when the DAC latch is updated. See the DAC Output Update section for details. If
asynchronous mode is desired, LDAC must be permanently tied low before power is applied to the
device. If synchronous mode is desired, LDAC must be logic high during power-on.
I
Reset input (active low). Logic low on this pin resets the DAC registers and DACs to the values defined
by the RSTSEL pin. CS must be at logic high when RST is used.
I Address bit A0 to specify the internal registers.
I Address bit A1 to specify the internal registers.
I Digital power supply
I Digital ground
I Address bit A2 to specify the internal registers.
I Address bit A3 to specify the internal registers.
I Address bit A4 to specify the internal registers.
I Digital ground
I/O
General-purpose digital input/output. This pin is a bidirectional, open-drain, digital input/output, and
requires an external pullup resistor. See the GPIO Pin section for details.
I
Output reset selection. Selects the output voltage on the V_OUT pin after power-on or hardware reset.
Refer to the Power-On Reset section for details.
O DAC-7 output
O
OFFSET DAC-B analog output. Must be connected to AGND-B during single-supply operation
(AV_SS = 0V). This pin is not intended to drive an external load.
I Negative analog power supply. Connect to AGND in single-supply operation.
O DAC-6 output
I Group B⁽²⁾ analog ground and the ground of REF-B. This pin must be tied to AGND-A and DGND.
I Positive analog power supply
O DAC-5 output
I Group B⁽²⁾ reference input
O DAC-4 output
— Not connected
I/O Data bit 0
I/O Data bit 1
I/O Data bit 2
I/O Data bit 3
I/O Data bit 4
I/O Data bit 5
I/O Data bit 6
I Digital ground
I Digital interface power supply
I Digital power supply
I Read and write signal. High for reading operation; low for writing operation.
I Chip select input (active low)
I/O Data bit 7
I/O Data bit 8
I/O Data bit 9
I/O Data bit 10
I/O Data bit 11
I/O Data bit 12
(2) Group A consists of DAC-0, DAC-1, DAC-2, and DAC-3. Group B consists of DAC-4, DAC-5, DAC-6, and DAC-7.
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): DAC8728
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