DAC8728_14 Datasheet, PDF (5/56 Pages) Texas Instruments – Octal, 16-Bit, Low-Power, High-Voltage Output, Parallel Input DIGITAL-TO-ANALOG CONVERTER

DAC8728
www.ti.com
SBAS466A – JUNE 2009 – REVISED NOVEMBER 2009
ELECTRICAL CHARACTERISTICS: Dual-Supply (continued)
All specifications at T_A = T_MIN to T_MAX, AV_DD = +16.5V, AV_SS = –16.5V, DV_DD = +5V, REF-A and REF-B = +5V, gain = 6,
AGND-x = DGND = 0V, and Offset DAC A and Offset DAC B are at default values ⁽¹⁾, unless otherwise noted.
DAC8728
PARAMETER
OFFSET DAC OUTPUT^{(14) (15)}
CONDITIONS
MIN
TYP
MAX
UNIT
Voltage output
Full-scale error
Zero-code error
Linearity error
V_REF = +5V
T_A = +25°C
T_A = +25°C
0
±4
±2
±6
5
V
LSB
LSB
LSB
Differential linearity error
±1
LSB
ANALOG MONITOR PIN (V_MON)
Output impedance⁽¹⁶⁾
Three-state leakage current
T_A = +25°C
2000
Ω
100
nA
REFERENCE INPUT
Reference input voltage range⁽¹⁷⁾
1.0
5.5
V
Reference input dc impedance
10
MΩ
Reference input capacitance
DIGITAL INPUT⁽¹⁴⁾
10
pF
High-level input voltage, V_IH
Low-level input voltage, V_IL
Input current
IOV_DD = +4.5V to +5.5V
IOV_DD = +2.7V to +3.3V
IOV_DD = +1.7V to 2.0V
IOV_DD = +4.5V to +5.5V
IOV_DD = +2.7V to +3.3V
IOV_DD = +1.7V to 2.0V
CLR, LDAC, RST, A0 to A4, R/W, and CS
USB/BTC, RSTSEL, and D0 to D15, and GPIO
3.8
2.3
1.5
–0.3
–0.3
–0.3
0.3 + IOV_DD
V
0.3 + IOV_DD
V
0.3 + IOV_DD
V
0.8
V
0.6
V
0.3
V
±1
μA
±5
μA
CLR, LDAC, RST, A0 to A4, R/W, and CS
5
pF
Input capacitance
USB/BTC, RSTSEL, and D0 to D15
12
pF
DIGITAL OUTPUT⁽¹⁴⁾
GPIO
14
pF
High-level output voltage, V_OH
(D0 to D15)
Low-level output voltage, V_OL (D0
to D15, BUSY, and GPIO)
High-impedance leakage current
IOV_DD = +2.7V to +5.5V, sourcing 1mA
IOV_DD = +1.8V, sourcing 200μA
IOV_DD = +2.7V to +5.5V, sinking 1mA
IOV_DD = +1.8V, sinking 200μA
D0 to D13, BUSY, and GPIO
IOV_DD – 0.4
1.6
0
0
IOV_DD
V
IOV_DD
V
0.4
V
0.2
V
±5
μA
High-impedance output
capacitance
BUSY and GPIO
14
pF
(14) Specified by design.
(15) Offset DAC A and Offset DAC B are trimmed in manufacturing to minimize the error for symmetrical output. The default value may vary
no more than ±10 LSB from the nominal number listed in Table 8. These pins are not intended to drive an external load, and must not
be connected during dual-supply operation.
(16) 8000Ω when V_MON is connected to Reference Buffer A or B.
(17) Reference input voltage ≤ DV_DD.
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): DAC8728
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