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DAC8728_14 Datasheet, PDF (36/56 Pages) Texas Instruments – Octal, 16-Bit, Low-Power, High-Voltage Output, Parallel Input DIGITAL-TO-ANALOG CONVERTER
DAC8728
SBAS466A – JUNE 2009 – REVISED NOVEMBER 2009
www.ti.com
OFFSET DACS
There are two 16-bit Offset DACs: one for Group A, and one for Group B. The Offset DACs allow the entire
output curve of the associated DAC groups to be shifted by introducing a programmable offset. This offset allows
for asymmetric bipolar operation of the DACs or unipolar operation with bipolar supplies. Thus, subject to the
limitations of headroom, it is possible to set the output range of Group A and/or Group B to be unipolar positive,
unipolar negative, symmetrical bipolar, or asymmetrical bipolar, as shown in Table 6 and Table 7. Increasing the
digital input codes for the offset DAC shifts the outputs of the associated channels in the negative direction. The
default codes for the Offset DACs in the DAC8728 are factory trimmed to provide optimal offset and gain
performance for the default output range and span of symmetric bipolar operation. When the output range is
adjusted by changing the value of the Offset DAC, an extra offset is introduced as a result of the linearity and
offset errors of the Offset DAC. Therefore, the actual shift in the output span may vary slightly from the ideal
calculations. For optimal offset and gain performance in the default symmetric bipolar operation, the Offset DAC
input codes should not be changed from the default power-on values. The maximum allowable offset depends on
the reference and the power supply. If INPUT_CODE from Equation 1 or DAC_DATA_CODE from Equation 2 is
set to 0, then these equations simplify to Equation 3:
VOUT = -VREF ´ (Gain - 1) ´
OFFSETDAC_CODE
65536
(3)
This equation shows the transfer function of the Offset DAC to the output of the DAC channels. In any case, the
analog output must not go beyond the specified range shown in the Analog Outputs section. After power-on or
reset, the Offset DAC is set to the value defined by the selected data format and the selected analog output
voltage. If the DAC gain setting is changed, the offset DAC code is reset to the default value corresponding to
the new DAC gain setting. Refer to the Power-On Reset and Hardware Reset sections for details.
For single-supply operation (AVSS = 0V), the Offset DAC is turned off, and the output amplifier is in a Hi-Z state.
The OFFSET-x pin must be connected to the AGND-x pin through a low-impedance connection. For dual-supply
operation, this pin provides the output of the Offset DAC. The OFFSET-x pin is not intended to drive an external
load. See Figure 96 for the internal Offset DAC and output amplifier configuration.
Table 6. Example of Offset DAC Codes and Output Ranges with Gain = 6 and VREF = 5V
OFFSET DAC
CODE
999Ah (1)
OFFSET DAC
VOLTAGE
3.0V
DAC CHANNELS MFS
VOLTAGE
–15V
DAC CHANNELS PFS
VOLTAGE
+15V – 1 LSB
0000h
0V
0V
+30V – 1 LSB
FFFFh
~5.0V
–25V
+5V – 1 LSB
6666h
~2.0V
–10V
+20V – 1 LSB
CCCDh
~4.0V
–20V
+10V – 1 LSB
(1) This is the default code for symmetric bipolar operation; actual codes may vary ±10 LSB. Codes are in straight binary format.
Table 7. Example of Offset DAC Codes and Output Ranges with Gain = 4 and VREF = 5V
OFFSET DAC
CODE
AAABh (1)
OFFSET DAC
VOLTAGE
~3.33333V
DAC CHANNELS MFS
VOLTAGE
–10V
DAC CHANNELS PFS
VOLTAGE
+10V – 1 LSB
0000h
0V
0V
+20V – 1 LSB
FFFFh
~5.0V
–15V
+5V – 1 LSB
5555h
~1.666V
–5V
+15V – 1 LSB
8000h
2.5V
–7.5V
+12.5V – 1 LSB
D555h
~4.1666V
–12.5V
+7.5V – 1 LSB
(1) This is the default code for symmetric bipolar operation; actual codes may vary ±10 LSB. Codes are in straight binary format.
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