DS90UB928Q-Q1 Datasheet, PDF (54/69 Pages) Texas Instruments – 5 MHz to 85 MHz 24-bit Color FPD-Link III to FPD-Link Deserializer With Bidirectional Control Channel

DS90UB928Q-Q1
SNLS417C – MARCH 2013 – REVISED JULY 2016
www.ti.com
Register Maps (continued)
Table 8. Serial Control Bus Registers^{(1) (2)} (continued)
ADD
(dec)
ADD
(hex)
Register Name
Bit
Register
Type
Default
(hex)
Function
Description
110 0x6E GPI Pin Status
7
R
0x00 GPI7 Pin GPI7 Pin Status. Readable when REG_GPIO7 is set
1
Status
as an input.
6
R
GPI6 Pin
Status
GPI6 Pin Status. Readable when REG_GPIO6 is set
as an input.
5
R
GPI5 Pin
Status
GPI5 Pin Status. Readable when REG_GPIO5 is set
as an input.
4
Reserved
3
R
GPI3 Pin
Status
GPI3 Pin Status. Readable when GPIO3 is set as an
input.
2
R
GPI2 Pin
Status
GPI2 Pin Status. Readable when GPIO2 is set as an
input.
1
R
GPI1 Pin
Status
GPI1 Pin Status. Readable when GPIO1 is set as an
input.
0
R
GPI0 Pin
Status
GPI0 Pin Status. Readable when GPIO0 is set as an
input.
111 0x6F GPI Pin Status 7:1
2
0
R
0x00
GPI8 Pin
Status
Reserved
GPI8 Pin Status. Readable when REG_GPIO8 is set
as an input.
240 0xF0 RX ID
7:0
R
0x5F ID0
First byte ID code, ‘_’
241 0xF1
7:0
R
0x55 ID1
Second byte of ID code, ‘U’
242 0xF2
7:0
R
0x42 ID2
Third byte of ID code. 'B'
243 0xF3
7:0
R
0x39 ID3
Forth byte of ID code: ‘9’
244 0xF4
7:0
R
0x32 ID4
Fifth byte of ID code: “2”
245 0xF5
7:0
R
0x38 ID5
Sixth byte of ID code: “8”
54
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