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DS90UH926Q Datasheet, PDF (5/57 Pages) Texas Instruments – 720p 24-bit Color FPD-Link III Deserializer with HDCP
DS90UH926Q
Pin Name
Pin #
Power* and Ground
VDD33_A,
VDD33_B
48, 29
VDDIO
13, 24, 38
GND
DAP
Regulator Capacitor
CAPR12,
CAPP12,
CAPI2S
55, 57, 58
CAPL12
4
Others
NC
RES[1:0]
54
43.47
I/O, Type Description
Power Power to on-chip regulator 3.0 V – 3.6 V. Requires 4.7 uF to GND at each VDD pin.
Power
Ground
LVCMOS I/O Power 1.8 V ±5% OR 3.0 V – 3.6 V. Requires 4.7 uF to GND at each VDDIO
pin.
DAP is the large metal contact at the bottom side, located at the center of the LLP
package. Connect to the ground plane (GND) with at least 9 vias.
CAP
CAP
Decoupling capacitor connection for on-chip regulator. Requires a 4.7uF to GND at each
CAP pin.
Decoupling capacitor connection for on-chip regulator. Requires two 4.7uF to GND at this
CAP pin.
NC
GND
No connect. This pin may be left open or tied to any level.
Reserved. Tie to Ground.
*The VDD (VDD33 and VDDIO) supply ramp should be faster than 1.5 ms with a monotonic rise.
Block Diagram
30136428
Ordering Information
 PART NUMBER  PACKAGE DESCRIPTION
Quantity
SPEC Package ID
DS90UH926QSQE 60-pin LLP, 9.0 X 9.0 X 0.8 mm, 0.5 mm pitch
250
NOPB
SQA60B
DS90UH926QSQ
60-pin LLP, 9.0 X 9.0 X 0.8 mm, 0.5 mm pitch
1000
NOPB
SQA60B
DS90UH926QSQX 60-pin LLP, 9.0 X 9.0 X 0.8 mm, 0.5 mm pitch
2500
NOPB
SQA60B
Note: Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market,
including defect detection methodologies. Reliability qualification is compliant with the requirements and temperature grades
defined in the AEC Q100 standard. Automotive Grade products are identified with the letter Q. For more information go to
http://www.ti.com/automotive.
Copyright © 1999-2012, Texas Instruments Incorporated
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