DS90UH926Q Datasheet, PDF (1/57 Pages) Texas Instruments – 720p 24-bit Color FPD-Link III Deserializer with HDCP

DS90UH926Q
720p 24-bit Color FPD-Link III Deserializer with HDCP
General Description
The DS90UH926Q deserializer, in conjunction with the
DS90UH925Q serializer, provides a solution for secure dis-
tribution of content-protected digital video within automotive
entertainment systems. This chipset translates a parallel RGB
Video Interface into a single pair high-speed serialized inter-
face. The digital video data is protected using the industry
standard HDCP copy protection scheme. The serial bus
scheme, FPD-Link III, supports full duplex of high speed for-
ward data transmission and low speed backchannel commu-
nication over a single differential link. Consolidation of video
data and control over a single differential pair reduces the in-
terconnect size and weight, while also eliminating skew issues
and simplifying system design.
The DS90UH926Q deserializer recovers the RGB data, three
video control signals and four synchronized I2S audio signals.
It extracts the clock from a high speed serial stream. An output
LOCK pin provides the link status if the incoming data stream
is locked, without the use of a training sequence or special
SYNC patterns, as well as a reference clock.
The DS90UH926Q deserializer has a 31-bit parallel LVCMOS
output interface to accommodate the RGB, video control, and
audio data.
An adaptive equalizer optimizes the maximum cable reach.
EMI is minimized by output SSC generation (SSCG) and En-
hanced Progressive Turn-On (EPTO) features.
The HDCP cipher engine is implemented in both the serializer
and deserializer. HDCP keys are stored in on-chip memory.
Applications Diagram
Features
● ^{Integrated HDCP cipher engine with on-chip key storage}
● ^{Bidirectional control interface channel interface with I2C}
compatible serial control bus
● ^{Supports high definition (720p) digital video format}
● ^{RGB888 + VS, HS, DE and synchronized I2S audio}
supported
● ^{5 to 85 MHz PCLK supported}
● ^{Single 3.3V Operation with 1.8V or 3.3V compatible}
LVCMOS I/O interface
● ^{AC-coupled STP Interconnect up to 10 meters}
● ^{Parallel LVCMOS video outputs}
● ^{I2C compatible serial control bus for configuration}
● ^{DC-balanced & scrambled Data w/ Embedded Clock}
● ^{Adaptive cable equalization}
● ^{Supports HDCP repeater application}
● ^{@ SPEED Link BIST Mode and LOCK status pin}
● ^{Image Enhancement (White Balance and Dithering) and}
Internal pattern generation
● ^{EMI Minimization (SSCG and EPTO)}
● ^{Low power modes minimize power dissipation}
● ^{Automotive grade product: AEC-Q100 Grade 2 qualified}
● ^{>8kV HBM and ISO 10605 ESD rating}
● ^{Backward compatible modes}
Applications
● ^{Automotive Display for Navigation}
● ^{Rear Seat Entertainment Systems}
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PRODUCTION DATA information is current as of
publication date. Products conform to specifications per
the terms of the Texas Instruments standard warranty.
Production processing does not necessarily include
testing of all parameters.
301364 SNLS337I
30136427
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