TL16C752D Datasheet, PDF (43/56 Pages) Texas Instruments – TL16C752D Dual UART With 64-Byte FIFO

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TL16C752D
SLLSEN8B – SEPTEMBER 2015 – REVISED MARCH 2016
The TL16C752D device can decode positive pulses on RX. The timing is different, but the variation is invisible to
the UART. The decoder, which works from the falling edge, now recognizes a 0 on the trailing edge of the pulse
rather than on the leading edge. As long as the pulse duration is fairly constant, as defined by the specification,
the trailing edges should also be 16 clock cycles apart and data can readily be decoded. The 0 appears on
Int_RX after the pulse rather than at the start of it.
RX
16XCLK
Int_RX
12 3 4 5 67 8
10
12
14
16
Figure 37. Positive RX Pulse Decode – Detailed View
16XCLK
16
Cycles
16
Cycles
16
Cycles
16
Cycles
RX
Int_RX
Figure 38. Positive RX Pulse Decode – Macro View
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